{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:53:24Z","timestamp":1750308804424,"version":"3.41.0"},"reference-count":17,"publisher":"Association for Computing Machinery (ACM)","issue":"2","license":[{"start":{"date-parts":[[2009,6,1]],"date-time":"2009-06-01T00:00:00Z","timestamp":1243814400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Reconfigurable Technol. Syst."],"published-print":{"date-parts":[[2009,6]]},"abstract":"<jats:p>Operating frequencies of combinational logic circuits can be increased using Wave-Pipelining (WP), by adjusting the clock periods and clock skews. In this article, Built-In Self-Test (BIST) and System-on-Chip (SOC) approaches are proposed for automating this adjustment and they are evaluated by implementation of filters using a Distributed Arithmetic Algorithm (DAA) and sinewave generator using the COordinate Rotation DIgital Computer (CORDIC). Both the circuits are studied by adopting three schemes: wave-pipelining, pipelining, and nonpipelining. Xilinx Spartan II and Altera Cyclone II FPGAs with Nios II soft-core processor are used for implementation of the circuits with the BIST and SOC approaches, respectively. The proposed schemes increase the speed of the WP circuits by a factor of 1.19--2.6 compared to nonpipelined circuits. The pipelined circuits achieve higher speed than the WP circuits by a factor of 1.13--3.27 at the cost of increase in area and power. When both pipelined and WP circuits are operated at the same frequency, the former dissipates more power for circuits with higher word sizes and for moderate logic depths. The observation regarding the dependence of the superiority of the WP circuits with regard to power dissipation on the logic depth is one of the major contributions of this article.<\/jats:p>","DOI":"10.1145\/1534916.1534921","type":"journal-article","created":{"date-parts":[[2009,6,16]],"date-time":"2009-06-16T12:58:25Z","timestamp":1245157105000},"page":"1-19","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":5,"title":["Automation Schemes for FPGA Implementation of Wave-Pipelined Circuits"],"prefix":"10.1145","volume":"2","author":[{"given":"G.","family":"Seetharaman","sequence":"first","affiliation":[{"name":"Oxford Engineering College"}]},{"given":"B.","family":"Venkataramani","sequence":"additional","affiliation":[{"name":"National Institute of Technology"}]}],"member":"320","published-online":{"date-parts":[[2009,6]]},"reference":[{"key":"e_1_2_1_1_1","unstructured":"Altera Corp. 2003. Using the LogicLock methodology in the Quartus II design software. Application note 161. Altera version 3.3. Altera Corp. 2003. Using the LogicLock methodology in the Quartus II design software. Application note 161. Altera version 3.3."},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2007.144"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/275107.275139"},{"volume":"4","volume-title":"Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS\u201996)","author":"Boemo E. I.","key":"e_1_2_1_4_1"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/92.711317"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2005.850086"},{"volume-title":"Proceedings of the International Conference on ASIC. 12--17","author":"Martin G.","key":"e_1_2_1_7_1"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2002.805705"},{"key":"e_1_2_1_9_1","unstructured":"Parhi K. K. 1999. VLSI Signal Processing Systems. John Wiley &amp; Sons. Parhi K. K. 1999. VLSI Signal Processing Systems . John Wiley &amp; Sons."},{"key":"e_1_2_1_10_1","unstructured":"Smith M. J. S. 2003. Application Specific Integrated Circuits. Pearson Education Asia Pvt. Ltd Singapore. Smith M. J. S. 2003. Application Specific Integrated Circuits . Pearson Education Asia Pvt. Ltd Singapore."},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1080\/03772063.2006.11416466"},{"volume-title":"Wave Pipelining: Theory and Implementation","year":"1993","author":"Gray T.","key":"e_1_2_1_12_1"},{"key":"e_1_2_1_13_1","doi-asserted-by":"crossref","unstructured":"Tuttlebee W. 2004. Software Defined Radio: Baseband Technology for 3G. Wiley. Tuttlebee W. 2004. Software Defined Radio: Baseband Technology for 3G . Wiley.","DOI":"10.1002\/0470867728"},{"key":"e_1_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/TEC.1959.5222693"},{"key":"e_1_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2003.12.005"},{"key":"e_1_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/1478786.1478840"},{"key":"e_1_2_1_17_1","unstructured":"Xilinx Documentation library. 2003. Synthesis and Simulation Guide. Xilinx Corporation San Jose CA. Xilinx Documentation library. 2003. Synthesis and Simulation Guide . Xilinx Corporation San Jose CA."}],"container-title":["ACM Transactions on Reconfigurable Technology and Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1534916.1534921","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1534916.1534921","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T20:26:06Z","timestamp":1750278366000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1534916.1534921"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,6]]},"references-count":17,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2009,6]]}},"alternative-id":["10.1145\/1534916.1534921"],"URL":"https:\/\/doi.org\/10.1145\/1534916.1534921","relation":{},"ISSN":["1936-7406","1936-7414"],"issn-type":[{"type":"print","value":"1936-7406"},{"type":"electronic","value":"1936-7414"}],"subject":[],"published":{"date-parts":[[2009,6]]},"assertion":[{"value":"2008-07-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2009-03-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2009-06-01","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}