{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:34:55Z","timestamp":1750307695699,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":13,"publisher":"ACM","license":[{"start":{"date-parts":[[2009,4,13]],"date-time":"2009-04-13T00:00:00Z","timestamp":1239580800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2009,4,13]]},"DOI":"10.1145\/1558607.1558674","type":"proceedings-article","created":{"date-parts":[[2009,6,30]],"date-time":"2009-06-30T13:10:54Z","timestamp":1246367454000},"page":"1-4","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["Secure processing using dynamic partial reconfiguration"],"prefix":"10.1145","author":[{"given":"Christopher T.","family":"Rathgeb","sequence":"first","affiliation":[{"name":"University of Tennessee, Knoxville, TN"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Gregory D.","family":"Peterson","sequence":"additional","affiliation":[{"name":"University of Tennessee, Knoxville, TN"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2009,4,13]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"Modular Dynamic Reconfiguration in Virtex FPGAs. IEE Proceedings online no. 20050176. IEE Proc.-Comput. Digit. Tech.","volume":"153","author":"Anderson J.","year":"2006","unstructured":"]] Anderson , J. , Becker , T. , Blodget , B. , Lysaght , P. , and Sedcole , P . Modular Dynamic Reconfiguration in Virtex FPGAs. IEE Proceedings online no. 20050176. IEE Proc.-Comput. Digit. Tech. , Vol. 153 , No. 3, May 2006 ]]Anderson, J., Becker, T., Blodget, B., Lysaght, P., and Sedcole, P. Modular Dynamic Reconfiguration in Virtex FPGAs. IEE Proceedings online no. 20050176. IEE Proc.-Comput. Digit. Tech., Vol. 153, No. 3, May 2006"},{"key":"e_1_3_2_1_2_1","volume-title":"High-Level Specification of Runtime Reconfigurable Designs. Proceedings of the 2007 International Conference on Engineering of Reconfigurable Systems Algorithms (ERSA). 2007","author":"Athanas P. M.","year":"2007","unstructured":"]] Athanas , P. M. , Craven , S. D. , High-Level Specification of Runtime Reconfigurable Designs. Proceedings of the 2007 International Conference on Engineering of Reconfigurable Systems Algorithms (ERSA). 2007 , Las Vegas Nevada, USA, June 24--28 , 2007 ]]Athanas, P. M., Craven, S. D., High-Level Specification of Runtime Reconfigurable Designs. Proceedings of the 2007 International Conference on Engineering of Reconfigurable Systems Algorithms (ERSA). 2007, Las Vegas Nevada, USA, June 24--28, 2007"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/RME.2008.4595744"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/1016568.1016583"},{"volume-title":"Parallel and Distributed Processing Symposium, 2006. IPDPS 2006. 20th International","author":"Becker J.","key":"e_1_3_2_1_5_1","unstructured":"]] Becker , J. , H\u00fcbner , M. , and Schuck , C . 2006. Elementary Block Based 2-Dimensional Dynamic and Partial Reconfiguration for Virtex-II FPGAs . Parallel and Distributed Processing Symposium, 2006. IPDPS 2006. 20th International ]]Becker, J., H\u00fcbner, M., and Schuck, C. 2006. Elementary Block Based 2-Dimensional Dynamic and Partial Reconfiguration for Virtex-II FPGAs. Parallel and Distributed Processing Symposium, 2006. IPDPS 2006. 20th International"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2007.29"},{"key":"e_1_3_2_1_7_1","volume-title":"P.: A lightweight approach for embedded reconfiguration of FPGAs. In: Design, Automation and Test in Europe (DATE03)","author":"Blodget B.","year":"2003","unstructured":"]] Blodget , B. , McMillan , S. , Lysaght , P.: A lightweight approach for embedded reconfiguration of FPGAs. In: Design, Automation and Test in Europe (DATE03) , IEEE ( 2003 ) 399--400 ]]Blodget, B., McMillan, S., Lysaght, P.: A lightweight approach for embedded reconfiguration of FPGAs. In: Design, Automation and Test in Europe (DATE03), IEEE (2003) 399--400"},{"key":"e_1_3_2_1_8_1","volume-title":"Prasanna. A Self-Reconfiguring Platform. In Proceedings of Field Programmable Logic and Applications","author":"Blodget B.","year":"2003","unstructured":"]] Blodget , B. , Keller , E. , McMillan , S. , James-Roxby . P. , and Sundararajan , Prasanna. A Self-Reconfiguring Platform. In Proceedings of Field Programmable Logic and Applications , ( 2003 ) 565--574 ]]Blodget, B., Keller, E., McMillan, S., James-Roxby. P., and Sundararajan, Prasanna. A Self-Reconfiguring Platform. In Proceedings of Field Programmable Logic and Applications, (2003) 565--574"},{"volume-title":"FPGAs for Custom Computing Machines, 1997. Proceedings., The 5th Annual IEEE Symposium. 66--75","author":"Burns J.","key":"e_1_3_2_1_9_1","unstructured":"]] Burns , J. , Donlin , A. , Hogg , J. , Singh , S. , and Wit , Mark. A Dynamic Reconfiguration Run-Time System . FPGAs for Custom Computing Machines, 1997. Proceedings., The 5th Annual IEEE Symposium. 66--75 ]]Burns, J., Donlin, A., Hogg, J., Singh, S., and Wit, Mark. A Dynamic Reconfiguration Run-Time System. FPGAs for Custom Computing Machines, 1997. Proceedings., The 5th Annual IEEE Symposium. 66--75"},{"key":"e_1_3_2_1_10_1","volume-title":"Ann. Design Framework for Partial Run-Time FPGA Reconfiguration. Proceedings of 2008 Internation Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA)","author":"Conger C.","year":"2008","unstructured":"]] Conger , C. George , A. D. , and Gordon-Ross , Ann. Design Framework for Partial Run-Time FPGA Reconfiguration. Proceedings of 2008 Internation Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA) , Las Vegas, NV, July 14--17 , 2008 ]]Conger, C. George, A. D., and Gordon-Ross, Ann. Design Framework for Partial Run-Time FPGA Reconfiguration. Proceedings of 2008 Internation Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), Las Vegas, NV, July 14--17, 2008"},{"key":"e_1_3_2_1_11_1","volume-title":"How to Take Advantage of Partial Reconfiguration in FPGA Designs. Xilinx Corp","author":"Dorairaj N.","year":"2006","unstructured":"]] Dorairaj , N. , Goosman , M. , and Shiflet , E . How to Take Advantage of Partial Reconfiguration in FPGA Designs. Xilinx Corp 2006 . http:\/\/www.pldesignline.com\/179100555 ]]Dorairaj, N., Goosman, M., and Shiflet, E. How to Take Advantage of Partial Reconfiguration in FPGA Designs. Xilinx Corp 2006. http:\/\/www.pldesignline.com\/179100555"},{"key":"e_1_3_2_1_12_1","volume-title":"Reconfigurable System on FPGA. Thesis","author":"Dyer M.","year":"2002","unstructured":"]] Dyer , M. , and Wirz , M. , Reconfigurable System on FPGA. Thesis 2002 . Institut fur Technische Informatik und Kommunikationsnetze. Computer Engineering and Networks Laboratory . ]]Dyer, M., and Wirz, M., Reconfigurable System on FPGA. Thesis 2002. Institut fur Technische Informatik und Kommunikationsnetze. Computer Engineering and Networks Laboratory."},{"key":"e_1_3_2_1_13_1","first-page":"177","volume":"200","author":"Mosley R.","unstructured":"]] Mosley , R. Reconnetics : A System for the Dynamic Implementation of Mobile Hardware Processes in FPGAs. Communicating Process Architectures 200 2. 177 -- 190 ]]Mosley, R. Reconnetics: A System for the Dynamic Implementation of Mobile Hardware Processes in FPGAs. Communicating Process Architectures 2002. 177--190","journal-title":"FPGAs. Communicating Process Architectures"}],"event":{"name":"CSIIRW '09: Fifth Cyber Security and Information Intelligence Research Workshop","acronym":"CSIIRW '09","location":"Oak Ridge Tennessee USA"},"container-title":["Proceedings of the 5th Annual Workshop on Cyber Security and Information Intelligence Research: Cyber Security and Information Intelligence Challenges and Strategies"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1558607.1558674","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1558607.1558674","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T13:29:57Z","timestamp":1750253397000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1558607.1558674"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,4,13]]},"references-count":13,"alternative-id":["10.1145\/1558607.1558674","10.1145\/1558607"],"URL":"https:\/\/doi.org\/10.1145\/1558607.1558674","relation":{},"subject":[],"published":{"date-parts":[[2009,4,13]]},"assertion":[{"value":"2009-04-13","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}