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ACM"],"published-print":{"date-parts":[[2009,9]]},"abstract":"<jats:p>The problem of writing software for multicore processors is greatly simplified if we could automatically parallelize sequential programs. Although auto-parallelization has been studied for many decades, it has succeeded only in a few application areas such as dense matrix computations. In particular, auto-parallelization of irregular programs, which are organized around large, pointer-based data structures like graphs, has seemed intractable.<\/jats:p>\n          <jats:p>The Galois project is taking a fresh look at autoparallelization. Rather than attempt to parallelize all programs no matter how obscurely they are written, we are designing programming abstractions that permit programmers to highlight opportunities for exploiting parallelism in sequential programs, and building a runtime system that uses these hints to execute the program in parallel. In this paper, we describe the design and implementation of a system based on these ideas. Experimental results for two real-world irregular applications, a Delaunay mesh refinement application and a graphics application that performs agglomerative clustering, demonstrate that this approach is promising.<\/jats:p>","DOI":"10.1145\/1562164.1562188","type":"journal-article","created":{"date-parts":[[2009,8,25]],"date-time":"2009-08-25T18:02:02Z","timestamp":1251223322000},"page":"89-97","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":19,"title":["Optimistic parallelism requires abstractions"],"prefix":"10.1145","volume":"52","author":[{"given":"Milind","family":"Kulkarni","sequence":"first","affiliation":[{"name":"University of Texas, Austin"}]},{"given":"Keshav","family":"Pingali","sequence":"additional","affiliation":[{"name":"University of Texas, Austin"}]},{"given":"Bruce","family":"Walter","sequence":"additional","affiliation":[{"name":"Cornell University, Ithaca, NY"}]},{"given":"Ganesh","family":"Ramanarayanan","sequence":"additional","affiliation":[{"name":"Cornell University, Ithaca, NY"}]},{"given":"Kavita","family":"Bala","sequence":"additional","affiliation":[{"name":"Cornell University, Ithaca, NY"}]},{"given":"L. Paul","family":"Chew","sequence":"additional","affiliation":[{"name":"Cornell University, Ithaca, NY"}]}],"member":"320","published-online":{"date-parts":[[2009,9]]},"reference":[{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/160985.161150"},{"key":"e_1_2_1_3_1","volume-title":"February","author":"de Galas J.","year":"2005","unstructured":"de Galas , J. The quest for more processing power: is the single core CPU doomed? http:\/\/www.anandtech.com\/cpuchipsets\/showdoc.aspx?I=2377 , February 2005 . de Galas, J. The quest for more processing power: is the single core CPU doomed? http:\/\/www.anandtech.com\/cpuchipsets\/showdoc.aspx?I=2377, February 2005."},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/267959.269969"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/237721.237724"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/1345206.1345237"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/165123.165164"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/1248377.1248435"},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/3916.3988"},{"key":"e_1_2_1_10_1","volume-title":"Morgan Kaufmann","author":"Kennedy K.","year":"2001","unstructured":"Kennedy , K. , Allen , J. , editors. Optimizing Compilers for Modern Architectures: A Dependence-Based Approach . Morgan Kaufmann , 2001 . Kennedy, K., Allen, J., editors. Optimizing Compilers for Modern Architectures: A Dependence-Based Approach. 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Introduction to Data Mining . Pearson Addison Wesley , 2005 . Pang-Ning Tan, M.S., Kumar, V., editors. Introduction to Data Mining. Pearson Addison Wesley, 2005."},{"key":"e_1_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/169627.169752"},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/71.752782"},{"key":"e_1_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/237721.237725"},{"key":"e_1_2_1_21_1","series-title":"Lecture Notes in Computer Science","volume-title":"Applied Computational Geometry: Towards Geometric Engineering","author":"Shewchuk J.R.","year":"1996","unstructured":"Shewchuk , J.R. Triangle: Engineering a 2D quality mesh generator and Delaunay triangulator . In Applied Computational Geometry: Towards Geometric Engineering , volume 1148 of Lecture Notes in Computer Science . May 1996 , 203--222. Shewchuk, J.R. Triangle: Engineering a 2D quality mesh generator and Delaunay triangulator. In Applied Computational Geometry: Towards Geometric Engineering, volume 1148 of Lecture Notes in Computer Science. May 1996, 203--222."},{"key":"e_1_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/339647.339650"},{"key":"e_1_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1145\/1073204.1073318"},{"key":"e_1_2_1_24_1","volume-title":"HPCA '98: Proceedings of the 4th International Symposium on High-Performance Computer Architecture","author":"Zhan L.R.Y.","year":"1998","unstructured":"Zhan , L.R.Y. , Torrellas , J. Hardware for speculative run-time parallelization in distributed shared-memory multiprocessors . In HPCA '98: Proceedings of the 4th International Symposium on High-Performance Computer Architecture ( 1998 ). Zhan, L.R.Y., Torrellas, J. Hardware for speculative run-time parallelization in distributed shared-memory multiprocessors. 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