{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,17]],"date-time":"2025-09-17T16:28:30Z","timestamp":1758126510553,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":3,"publisher":"ACM","license":[{"start":{"date-parts":[[2009,7,26]],"date-time":"2009-07-26T00:00:00Z","timestamp":1248566400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2009,7,26]]},"DOI":"10.1145\/1629911.1630082","type":"proceedings-article","created":{"date-parts":[[2009,10,13]],"date-time":"2009-10-13T15:11:11Z","timestamp":1255446671000},"page":"648-651","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":14,"title":["Beyond verification"],"prefix":"10.1145","author":[{"given":"Rajeev K.","family":"Ranjan","sequence":"first","affiliation":[{"name":"Jasper Design Automation, Mountain View, CA"}]},{"given":"Claudionor","family":"Coelho","sequence":"additional","affiliation":[{"name":"Jasper Design Automation Brazil, Belo Horizonte - MG"}]},{"given":"Sebastian","family":"Skalberg","sequence":"additional","affiliation":[{"name":"Jasper Design Automation, Mountain View, CA"}]}],"member":"320","published-online":{"date-parts":[[2009,7,26]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"Rajeev Ranjan et al. 2009. Toward harnessing the true potential of IP reuse. Design Con 2009.  Rajeev Ranjan et al. 2009. Toward harnessing the true potential of IP reuse. Design Con 2009."},{"volume-title":"Haifa Verification Conference 2008 (www.haifa.ibm.com\/conferences\/hvc2008\/present\/PostSiliconJamilRMazzawi_v1.pdf)","author":"Jamil","key":"e_1_3_2_1_2_1"},{"key":"e_1_3_2_1_3_1","unstructured":"Richard Ho et al. 2009. Post-silicon debug using formal verification waypoints. DV Con 2009.  Richard Ho et al. 2009. Post-silicon debug using formal verification waypoints. DV Con 2009."}],"event":{"name":"DAC '09: The 46th Annual Design Automation Conference 2009","sponsor":["EDAC Electronic Design Automation Consortium","SIGDA ACM Special Interest Group on Design Automation","IEEE-CAS Circuits & Systems"],"location":"San Francisco California","acronym":"DAC '09"},"container-title":["Proceedings of the 46th Annual Design Automation Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1629911.1630082","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1629911.1630082","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T12:23:21Z","timestamp":1750249401000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1629911.1630082"}},"subtitle":["leveraging formal for debugging"],"short-title":[],"issued":{"date-parts":[[2009,7,26]]},"references-count":3,"alternative-id":["10.1145\/1629911.1630082","10.1145\/1629911"],"URL":"https:\/\/doi.org\/10.1145\/1629911.1630082","relation":{},"subject":[],"published":{"date-parts":[[2009,7,26]]},"assertion":[{"value":"2009-07-26","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}