{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,13]],"date-time":"2026-01-13T13:18:57Z","timestamp":1768310337245,"version":"3.49.0"},"publisher-location":"New York, NY, USA","reference-count":19,"publisher":"ACM","license":[{"start":{"date-parts":[[2009,7,26]],"date-time":"2009-07-26T00:00:00Z","timestamp":1248566400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2009,7,26]]},"DOI":"10.1145\/1629911.1630086","type":"proceedings-article","created":{"date-parts":[[2009,10,13]],"date-time":"2009-10-13T15:11:11Z","timestamp":1255446671000},"page":"664-469","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":354,"title":["PDRAM"],"prefix":"10.1145","author":[{"given":"Gaurav","family":"Dhiman","sequence":"first","affiliation":[{"name":"University of California, San Diego, La Jolla, CA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Raid","family":"Ayoub","sequence":"additional","affiliation":[{"name":"University of California, San Diego, La Jolla, CA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tajana","family":"Rosing","sequence":"additional","affiliation":[{"name":"University of California, San Diego, La Jolla, CA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2009,7,26]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2007.443"},{"key":"e_1_3_2_1_2_1","first-page":"442","volume-title":"Symposium on VLSI Circuits","author":"Bedeschi F.","year":"2004","unstructured":"F. Bedeschi demonstrator for high-density 1.8V phase-change memories . In Symposium on VLSI Circuits , pages 442 -- 445 , 2004 . F. Bedeschi et al. An 8Mb demonstrator for high-density 1.8V phase-change memories. In Symposium on VLSI Circuits, pages 442--445, 2004."},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2008.4523240"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2006.82"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/513918.514095"},{"key":"e_1_3_2_1_6_1","unstructured":"http:\/\/www.hpl.hp.com\/research\/cacti\/.  http:\/\/www.hpl.hp.com\/research\/cacti\/."},{"key":"e_1_3_2_1_7_1","unstructured":"http:\/\/www.micron.com\/products\/dram\/ddr3\/.  http:\/\/www.micron.com\/products\/dram\/ddr3\/."},{"key":"e_1_3_2_1_8_1","unstructured":"http:\/\/www.numonyx.com\/Documents\/WhitePapers.  http:\/\/www.numonyx.com\/Documents\/WhitePapers."},{"key":"e_1_3_2_1_9_1","volume-title":"Proc ATEC'03","author":"Huang H.","year":"2003","unstructured":"H. Huang Design and implementation of power-aware virtual memory . In Proc ATEC'03 , 2003 . H. Huang et al. Design and implementation of power-aware virtual memory. In Proc ATEC'03, 2003."},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.32"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/ESSDERC.2007.4430917"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/384264.379007"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555758"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLS1.2008.2000517"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/1366110.1366204"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2003.1269376"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.sse.2008.04.031"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2003.1269423"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2008.926374"}],"event":{"name":"DAC '09: The 46th Annual Design Automation Conference 2009","location":"San Francisco California","acronym":"DAC '09","sponsor":["EDAC Electronic Design Automation Consortium","SIGDA ACM Special Interest Group on Design Automation","IEEE-CAS Circuits & Systems"]},"container-title":["Proceedings of the 46th Annual Design Automation Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1629911.1630086","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1629911.1630086","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T12:23:21Z","timestamp":1750249401000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1629911.1630086"}},"subtitle":["a hybrid PRAM and DRAM main memory system"],"short-title":[],"issued":{"date-parts":[[2009,7,26]]},"references-count":19,"alternative-id":["10.1145\/1629911.1630086","10.1145\/1629911"],"URL":"https:\/\/doi.org\/10.1145\/1629911.1630086","relation":{},"subject":[],"published":{"date-parts":[[2009,7,26]]},"assertion":[{"value":"2009-07-26","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}