{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,5]],"date-time":"2025-10-05T14:35:40Z","timestamp":1759674940276,"version":"3.41.0"},"reference-count":13,"publisher":"Association for Computing Machinery (ACM)","issue":"10","license":[{"start":{"date-parts":[[2009,11,1]],"date-time":"2009-11-01T00:00:00Z","timestamp":1257033600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["Queue"],"published-print":{"date-parts":[[2009,11]]},"abstract":"<jats:p>In computing systems, a CPU is usually one of the largest consumers of energy. For this reason, reducing CPU power consumption has been a hot topic in the past few years in both the academic community and the industry. In the quest to create more power-efficient CPUs, several researchers have proposed an asymmetric multicore architecture that promises to save a significant amount of power while delivering similar performance to conventional symmetric multicore processors.<\/jats:p>","DOI":"10.1145\/1647300.1658422","type":"journal-article","created":{"date-parts":[[2020,9,3]],"date-time":"2020-09-03T03:31:05Z","timestamp":1599103865000},"page":"30-45","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":5,"title":["Maximizing Power Efficiency with Asymmetric Multicore Systems"],"prefix":"10.1145","volume":"7","author":[{"given":"Alexandra","family":"Fedorova","sequence":"first","affiliation":[{"name":"Simon Fraser University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Juan Carlos","family":"Saez","sequence":"additional","affiliation":[{"name":"Complutense University of Madrid"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Daniel","family":"Shelepov","sequence":"additional","affiliation":[{"name":"Microsoft"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Manuel","family":"Prieto","sequence":"additional","affiliation":[{"name":"Complutense University of Madrid"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2009,11]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.36"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/1128022.1128029"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.5555\/1153925.1154584"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2008.209"},{"key":"e_1_2_1_5_1","volume-title":"Proceedings of the International Symposium on Microarchitecture (MICRO-36)","author":"Kumar R.","year":"2003","unstructured":"Kumar , R. , Farkas , K. I. , Jouppi , N. , 2003 . Single-ISA heterogeneous multicore architectures: the potential for processor power reduction . In Proceedings of the International Symposium on Microarchitecture (MICRO-36) . Kumar, R., Farkas, K. I., Jouppi, N., et al. 2003. Single-ISA heterogeneous multicore architectures: the potential for processor power reduction. In Proceedings of the International Symposium on Microarchitecture (MICRO-36)."},{"key":"e_1_2_1_6_1","volume-title":"Proceedings of the International Symposium on Computer Architecture (ISCA).","author":"Kumar R.","year":"2004","unstructured":"Kumar , R. , 2004 . Single-ISA heterogeneous multicore architectures for multithreaded workload performance . In Proceedings of the International Symposium on Computer Architecture (ISCA). Kumar, R., et al. 2004. Single-ISA heterogeneous multicore architectures for multithreaded workload performance. In Proceedings of the International Symposium on Computer Architecture (ISCA)."},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/1362622.1362694"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/1065010.1065034"},{"key":"e_1_2_1_9_1","unstructured":"Saez J. C. Shelepov D. Fedorova A. Prieto M. 2009. Leveraging workload diversity through OS scheduling to maximize performance on single-ISA heterogeneous multicore systems. Submitted to Transactions on Parallel and Distributed Systems.  Saez J. C. Shelepov D. Fedorova A. Prieto M. 2009. Leveraging workload diversity through OS scheduling to maximize performance on single-ISA heterogeneous multicore systems. Submitted to Transactions on Parallel and Distributed Systems."},{"key":"e_1_2_1_10_1","unstructured":"Saez J. C. Fedorova A. Prieto M. Vegas H. Submitted to a conference for blind review. Details omitted to preserve anonymity.  Saez J. C. Fedorova A. Prieto M. Vegas H. Submitted to a conference for blind review. Details omitted to preserve anonymity."},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/1531793.1531804"},{"key":"e_1_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/1353534.1346317"},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/1508244.1508259"}],"container-title":["Queue"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1647300.1658422","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1647300.1658422","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T12:40:57Z","timestamp":1750250457000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1647300.1658422"}},"subtitle":["Asymmetric multicore systems promise to use a lot less energy than conventional symmetric processors. How can we develop software that makes the most out of this potential?"],"short-title":[],"issued":{"date-parts":[[2009,11]]},"references-count":13,"journal-issue":{"issue":"10","published-print":{"date-parts":[[2009,11]]}},"alternative-id":["10.1145\/1647300.1658422"],"URL":"https:\/\/doi.org\/10.1145\/1647300.1658422","relation":{},"ISSN":["1542-7730","1542-7749"],"issn-type":[{"type":"print","value":"1542-7730"},{"type":"electronic","value":"1542-7749"}],"subject":[],"published":{"date-parts":[[2009,11]]},"assertion":[{"value":"2009-11-01","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}