{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:33:11Z","timestamp":1750307591221,"version":"3.41.0"},"reference-count":36,"publisher":"Association for Computing Machinery (ACM)","issue":"2","license":[{"start":{"date-parts":[[2010,2,1]],"date-time":"2010-02-01T00:00:00Z","timestamp":1264982400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100002809","name":"Generalitat de Catalunya","doi-asserted-by":"publisher","award":["2005SGR00950"],"award-info":[{"award-number":["2005SGR00950"]}],"id":[{"id":"10.13039\/501100002809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003176","name":"Ministerio de Educaci\u00f3n, Cultura y Deporte","doi-asserted-by":"publisher","award":["TIN2004-03702TIN2007-61763"],"award-info":[{"award-number":["TIN2004-03702TIN2007-61763"]}],"id":[{"id":"10.13039\/501100003176","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Comput. Surv."],"published-print":{"date-parts":[[2010,2]]},"abstract":"<jats:p>Degradation of devices has become a major issue for processor design due to continuous device shrinkage and current density increase. Transistors and wires suffer high stress, and failures may appear in the field. In particular, wires degrade mainly due to electromigration when driving current. Techniques to mitigate electromigration to some extent have been proposed from the circuit point of view, but much effort is still required from the microarchitecture side to enable wire scaling in future technologies.<\/jats:p>\n          <jats:p>This survey brings to the microarchitecture community a comprehensive study of the causes and implications of electromigration in digital circuits and describes the challenges that must be faced to mitigate electromigration by means of microarchitectural solutions.<\/jats:p>","DOI":"10.1145\/1667062.1667066","type":"journal-article","created":{"date-parts":[[2010,3,2]],"date-time":"2010-03-02T19:20:32Z","timestamp":1267557632000},"page":"1-18","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":20,"title":["Electromigration for microarchitects"],"prefix":"10.1145","volume":"42","author":[{"given":"Jaume","family":"Abella","sequence":"first","affiliation":[{"name":"Intel Barcelona Research Center, Intel Labs -- UPC, Barcelona, Spain"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xavier","family":"Vera","sequence":"additional","affiliation":[{"name":"Intel Barcelona Research Center, Intel Labs -- UPC, Barcelona, Spain"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2010,3,5]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1007\/s10470-005-6761-x"},{"volume-title":"Proceedings of the IEEE International Interconnect Technology Conference. IEEE","author":"Arnaud L.","key":"e_1_2_1_2_1","unstructured":"Arnaud , L. , Tartavel , G. L. , and Ulmer , P. W . 1998. Analysis of Blech product threshold in passivated AlCu interconnections . In Proceedings of the IEEE International Interconnect Technology Conference. IEEE , Los Alamitos, CA, 289--291. Arnaud, L., Tartavel, G. L., and Ulmer, P. W. 1998. Analysis of Blech product threshold in passivated AlCu interconnections. In Proceedings of the IEEE International Interconnect Technology Conference. IEEE, Los Alamitos, CA, 289--291."},{"volume-title":"Proceedings of the 36th International Reliability Physics Symposium (IRPS'98)","author":"Atakov E. M.","key":"e_1_2_1_3_1","unstructured":"Atakov , E. M. , Sriram , T. S. , Dunnell , D. , and Pizzanello , S . 1998. Effect of VLSI interconnect layout on electromigration performance . In Proceedings of the 36th International Reliability Physics Symposium (IRPS'98) , IEEE, Los Alamitos, CA, 348--355. Atakov, E. M., Sriram, T. S., Dunnell, D., and Pizzanello, S. 1998. Effect of VLSI interconnect layout on electromigration performance. In Proceedings of the 36th International Reliability Physics Symposium (IRPS'98), IEEE, Los Alamitos, CA, 348--355."},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1969.7340"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1063\/1.322842"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1063\/1.1755127"},{"key":"e_1_2_1_7_1","volume-title":"Proceedings of the 2nd Workshop on System Effects of Logic Soft Errors (SELSE'06)","author":"Borkar S.","year":"2006","unstructured":"Borkar , S. 2006 . Extending and expanding Moore's law -- Challenges and opportunities . In Proceedings of the 2nd Workshop on System Effects of Logic Soft Errors (SELSE'06) . Borkar, S. 2006. Extending and expanding Moore's law -- Challenges and opportunities. In Proceedings of the 2nd Workshop on System Effects of Logic Soft Errors (SELSE'06)."},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1002\/1521-4079(200007)35:6\/7<721::AID-CRAT721>3.0.CO;2-2"},{"key":"e_1_2_1_9_1","unstructured":"Cadence. 2002a. Electromigration for designers: An introduction for the non-specialist. White paper Cadence.  Cadence. 2002a. Electromigration for designers: An introduction for the non-specialist. White paper Cadence."},{"key":"e_1_2_1_10_1","unstructured":"Cadence. 2002b. Power grid verification. White paper Cadence.  Cadence. 2002b. Power grid verification. White paper Cadence."},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/1120725.1120831"},{"volume-title":"Proceedings of the International Symposium on Circuits and Systems (ISCAS'05)","author":"Chiarulli D. M.","key":"e_1_2_1_12_1","unstructured":"Chiarulli , D. M. , Bakos , J. D. , Martin , J. R. , and Levitan , S. P . 2005. Area, power, and pin efficient bus transceiver using multi-bit-differential signaling . In Proceedings of the International Symposium on Circuits and Systems (ISCAS'05) . IEEE, Los Alamitos, CA, 1662--1665. Chiarulli, D. M., Bakos, J. D., Martin, J. R., and Levitan, S. P. 2005. Area, power, and pin efficient bus transceiver using multi-bit-differential signaling. In Proceedings of the International Symposium on Circuits and Systems (ISCAS'05). IEEE, Los Alamitos, CA, 1662--1665."},{"volume-title":"Proceedings of the IEEE International Symposium on Electromagnetic Compatibility (EMC'02)","author":"Choi J.","key":"e_1_2_1_13_1","unstructured":"Choi , J. , Wan , L. , Swaminathan , M. , Beker , B. , and Master , R . 2002. Modeling of realistic onchip power grid using the FDTD method . In Proceedings of the IEEE International Symposium on Electromagnetic Compatibility (EMC'02) . IEEE, Los Alamitos, CA, 238--243. Choi, J., Wan, L., Swaminathan, M., Beker, B., and Master, R. 2002. Modeling of realistic onchip power grid using the FDTD method. In Proceedings of the IEEE International Symposium on Electromagnetic Compatibility (EMC'02). IEEE, Los Alamitos, CA, 238--243."},{"key":"e_1_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/240518.240585"},{"key":"e_1_2_1_15_1","unstructured":"De Gelas J. 2006. Intel Core versus AMD's K8 architecture. AnandTech. http:\/\/www.anandtech.com.  De Gelas J. 2006. Intel Core versus AMD's K8 architecture. AnandTech. http:\/\/www.anandtech.com."},{"key":"e_1_2_1_16_1","first-page":"255","article-title":"Activation energy in the early stage of electromigration in Al-1&percnt; Si\/TiN\/Ti bamboo lines. Semiconductor Sci","volume":"10","author":"De Munari I.","year":"1995","unstructured":"De Munari , I. , Scorzoni , A. , Tamarri , F. , and Fantini , F. 1995 . Activation energy in the early stage of electromigration in Al-1&percnt; Si\/TiN\/Ti bamboo lines. Semiconductor Sci . Technol. 10 , 3, 255 -- 259 . De Munari, I., Scorzoni, A., Tamarri, F., and Fantini, F. 1995. Activation energy in the early stage of electromigration in Al-1&percnt; Si\/TiN\/Ti bamboo lines. Semiconductor Sci. Technol. 10, 3, 255--259.","journal-title":"Technol."},{"key":"e_1_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1971.8447"},{"key":"e_1_2_1_18_1","unstructured":"JEDEC. 2002. Failure mechanisms and models for semiconductor devices. JEDEC Publication JEP122-A.  JEDEC. 2002. Failure mechanisms and models for semiconductor devices. JEDEC Publication JEP122-A."},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/1123008.1123017"},{"key":"e_1_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICVD.2005.88"},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/16.108197"},{"key":"e_1_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/IRPS.1989.363390"},{"volume-title":"Proceedings of the 8th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA'01)","author":"Nguyen H. V.","key":"e_1_2_1_23_1","unstructured":"Nguyen , H. V. , Salm , C. , Mouthaan , T. J. , and Kuper , F. G . 2001. Modelling of the reservoir effect on electromigration lifetime . In Proceedings of the 8th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA'01) . IEEE, Los Alamitos, CA, 169--173. Nguyen, H. V., Salm, C., Mouthaan, T. J., and Kuper, F. G. 2001. Modelling of the reservoir effect on electromigration lifetime. In Proceedings of the 8th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA'01). IEEE, Los Alamitos, CA, 169--173."},{"key":"e_1_2_1_24_1","first-page":"4","article-title":"Electromigration in thin-film interconnection lines: Models, methods and results. Material Sci","volume":"7","author":"Scorzoni A.","year":"1991","unstructured":"Scorzoni , A. , Neri , B. , Caprile , C. , and Fantini , F. 1991 . Electromigration in thin-film interconnection lines: Models, methods and results. Material Sci . Rep. 7 , 4 -- 5 , 143--220. Scorzoni, A., Neri, B., Caprile, C., and Fantini, F. 1991. Electromigration in thin-film interconnection lines: Models, methods and results. Material Sci. Rep. 7, 4--5, 143--220.","journal-title":"Rep."},{"key":"e_1_2_1_25_1","unstructured":"Semiconductors Industry Association (SIA). 2003. International technology roadmap for semiconductors.  Semiconductors Industry Association (SIA). 2003. International technology roadmap for semiconductors."},{"key":"e_1_2_1_26_1","unstructured":"Semiconductors Industry Association (SIA). 2005. International technology roadmap for semiconductors.  Semiconductors Industry Association (SIA). 2005. International technology roadmap for semiconductors."},{"key":"e_1_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2007.8"},{"volume-title":"Proceedings of the 31st Annual International Symposium on Computer Architecture (ISCA'04)","author":"Srinivasan J.","key":"e_1_2_1_28_1","unstructured":"Srinivasan , J. , Adve , S. V. , Bose , P. , and Rivers , J. A . 2004a. The case for lifetime reliability-aware microprocessors . In Proceedings of the 31st Annual International Symposium on Computer Architecture (ISCA'04) . IEEE, Los Alamitos, CA, 276. Srinivasan, J., Adve, S. V., Bose, P., and Rivers, J. A. 2004a. The case for lifetime reliability-aware microprocessors. In Proceedings of the 31st Annual International Symposium on Computer Architecture (ISCA'04). IEEE, Los Alamitos, CA, 276."},{"volume-title":"Proceedings of the International Conference on Dependable Systems and Networks (DSN'04)","author":"Srinivasan J.","key":"e_1_2_1_29_1","unstructured":"Srinivasan , J. , Adve , S. V. , Bose , P. , and Rivers , J. A . 2004b. The impact of technology scaling on lifetime reliability . In Proceedings of the International Conference on Dependable Systems and Networks (DSN'04) . IEEE, Los Alamitos, 177--186. Srinivasan, J., Adve, S. V., Bose, P., and Rivers, J. A. 2004b. The impact of technology scaling on lifetime reliability. In Proceedings of the International Conference on Dependable Systems and Networks (DSN'04). IEEE, Los Alamitos, 177--186."},{"key":"e_1_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1145\/277044.277231"},{"key":"e_1_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2004.837728"},{"volume-title":"Proceedings of the 40th International Reliability Physics Symposium (IRPS'02)","author":"Sun Y.","key":"e_1_2_1_32_1","unstructured":"Sun , Y. , Zhou , P. , Kim , D. Y. , Goodson , K. E. , and Wong , S. S . 2002. Recovery of open via after electromigration in Cu dual damascene interconnect . In Proceedings of the 40th International Reliability Physics Symposium (IRPS'02) . IEEE, Los Alamitos, CA, 435--436. Sun, Y., Zhou, P., Kim, D. Y., Goodson, K. E., and Wong, S. S. 2002. Recovery of open via after electromigration in Cu dual damascene interconnect. In Proceedings of the 40th International Reliability Physics Symposium (IRPS'02). IEEE, Los Alamitos, CA, 435--436."},{"key":"e_1_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1109\/16.491258"},{"key":"e_1_2_1_34_1","unstructured":"Toshiba Corp. 2002. Semiconductor reliability handbook (discrete devices).  Toshiba Corp. 2002. Semiconductor reliability handbook (discrete devices)."},{"key":"e_1_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1145\/1055626.1055647"},{"key":"e_1_2_1_36_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2004.842802"}],"container-title":["ACM Computing Surveys"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1667062.1667066","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1667062.1667066","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T12:41:30Z","timestamp":1750250490000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1667062.1667066"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,2]]},"references-count":36,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2010,2]]}},"alternative-id":["10.1145\/1667062.1667066"],"URL":"https:\/\/doi.org\/10.1145\/1667062.1667066","relation":{},"ISSN":["0360-0300","1557-7341"],"issn-type":[{"type":"print","value":"0360-0300"},{"type":"electronic","value":"1557-7341"}],"subject":[],"published":{"date-parts":[[2010,2]]},"assertion":[{"value":"2007-04-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2008-10-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2010-03-05","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}