{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,25]],"date-time":"2026-06-25T09:28:38Z","timestamp":1782379718252,"version":"3.54.5"},"publisher-location":"New York, NY, USA","reference-count":31,"publisher":"ACM","license":[{"start":{"date-parts":[[2009,12,12]],"date-time":"2009-12-12T00:00:00Z","timestamp":1260576000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["NSF CCF 0541383NSF CNS 0720743NSF CCF 0811693"],"award-info":[{"award-number":["NSF CCF 0541383NSF CNS 0720743NSF CCF 0811693"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000144","name":"Division of Computer and Network Systems","doi-asserted-by":"publisher","award":["NSF CCF 0541383NSF CNS 0720743NSF CCF 0811693"],"award-info":[{"award-number":["NSF CCF 0541383NSF CNS 0720743NSF CCF 0811693"]}],"id":[{"id":"10.13039\/100000144","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000143","name":"Division of Computing and Communication Foundations","doi-asserted-by":"publisher","award":["NSF CCF 0541383NSF CNS 0720743NSF CCF 0811693"],"award-info":[{"award-number":["NSF CCF 0541383NSF CNS 0720743NSF CCF 0811693"]}],"id":[{"id":"10.13039\/100000143","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2009,12,12]]},"DOI":"10.1145\/1669112.1669129","type":"proceedings-article","created":{"date-parts":[[2009,12,21]],"date-time":"2009-12-21T15:04:58Z","timestamp":1261407898000},"page":"122-132","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":45,"title":["mSWAT"],"prefix":"10.1145","author":[{"given":"Siva Kumar","family":"Sastry Hari","sequence":"first","affiliation":[{"name":"University of Illinois at Urbana-Champaign"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Man-Lap","family":"Li","sequence":"additional","affiliation":[{"name":"University of Illinois at Urbana-Champaign"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Pradeep","family":"Ramachandran","sequence":"additional","affiliation":[{"name":"University of Illinois at Urbana-Champaign"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Byn","family":"Choi","sequence":"additional","affiliation":[{"name":"University of Illinois at Urbana-Champaign"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Sarita V.","family":"Adve","sequence":"additional","affiliation":[{"name":"University of Illinois at Urbana-Champaign"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2009,12,12]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2005.70"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2005.110"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/1250727.1250728"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.5555\/1299042.1299113"},{"key":"e_1_3_2_1_5_1","volume-title":"Soft-Error Detection Using Control Flow Assertions. In International Symposium on Defect and Fault Tolerance in VLSI Systems","author":"Goloubeva O.","year":"2003","unstructured":"O. Goloubeva , M. Rebaudengo , M. S. Reonda , and M. Violante . Soft-Error Detection Using Control Flow Assertions. In International Symposium on Defect and Fault Tolerance in VLSI Systems , 2003 . O. Goloubeva, M. Rebaudengo, M. S. Reonda, and M. Violante. Soft-Error Detection Using Control Flow Assertions. In International Symposium on Defect and Fault Tolerance in VLSI Systems, 2003."},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2008.4771786"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.26"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2009.4798242"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2008.4630067"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/1346281.1346315"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2007.346196"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2009.5270291"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/511334.511349"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.8"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.36"},{"key":"e_1_3_2_1_16_1","volume-title":"Proceedings of the International Symposium on High Performance Computer Architecture (HPCA)","author":"Nakano J.","year":"2006","unstructured":"J. Nakano , P. Montesinos , K. Gharacorloo , and J. Torrellas . Re-ViveI\/O: Efficient Handling of I\/O in Highly-Available Rollback-Recovery Servers . In Proceedings of the International Symposium on High Performance Computer Architecture (HPCA) , 2006 . J. Nakano, P. Montesinos, K. Gharacorloo, and J. Torrellas. Re-ViveI\/O: Efficient Handling of I\/O in Highly-Available Rollback-Recovery Servers. In Proceedings of the International Symposium on High Performance Computer Architecture (HPCA), 2006."},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1007\/11408901_8"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.16"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/EDCC.2006.9"},{"key":"e_1_3_2_1_20_1","volume-title":"CrashTest: A Fast High-Fidelity FPGA-based Resiliency Analysis Framework. In IEEE International Conference on Computer Design","author":"Pellegrini A.","year":"2008","unstructured":"A. Pellegrini , K. Constantinides , D. Zhang , S. Sudhakar , V. Bertacco , and T. Austin . CrashTest: A Fast High-Fidelity FPGA-based Resiliency Analysis Framework. In IEEE International Conference on Computer Design , September 2008 . A. Pellegrini, K. Constantinides, D. Zhang, S. Sudhakar, V. Bertacco, and T. Austin. CrashTest: A Fast High-Fidelity FPGA-based Resiliency Analysis Framework. In IEEE International Conference on Computer Design, September 2008."},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.5555\/545215.545228"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2007.346195"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2008.4630072"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/1168857.1168868"},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.5555\/545215.545229"},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1147\/rd.435.0863"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.28"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/OLT.2003.1214380"},{"key":"e_1_3_2_1_29_1","volume-title":"Website","year":"2006","unstructured":"Virtutech. Simics Full System Simulator . Website , 2006 . http:\/\/www.simics.net. Virtutech. Simics Full System Simulator. Website, 2006. http:\/\/www.simics.net."},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1109\/TDSC.2006.40"},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1145\/859618.859633"}],"event":{"name":"Micro-42: The 42nd Annual IEEE\/ACM International Symposium on Microarchitecture","location":"New York New York","acronym":"Micro-42","sponsor":["SIGMICRO ACM Special Interest Group on Microarchitectural Research and Processing","IEEE-CS TG u-Arch"]},"container-title":["Proceedings of the 42nd Annual IEEE\/ACM International Symposium on Microarchitecture"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1669112.1669129","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1669112.1669129","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T12:18:03Z","timestamp":1750249083000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1669112.1669129"}},"subtitle":["low-cost hardware fault detection and diagnosis for multicore systems"],"short-title":[],"issued":{"date-parts":[[2009,12,12]]},"references-count":31,"alternative-id":["10.1145\/1669112.1669129","10.1145\/1669112"],"URL":"https:\/\/doi.org\/10.1145\/1669112.1669129","relation":{},"subject":[],"published":{"date-parts":[[2009,12,12]]},"assertion":[{"value":"2009-12-12","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}