{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:32:48Z","timestamp":1750307568733,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":33,"publisher":"ACM","license":[{"start":{"date-parts":[[2009,12,12]],"date-time":"2009-12-12T00:00:00Z","timestamp":1260576000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100000185","name":"Defense Advanced Research Projects Agency","doi-asserted-by":"publisher","award":["HR0011-07-9-002"],"award-info":[{"award-number":["HR0011-07-9-002"]}],"id":[{"id":"10.13039\/100000185","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000144","name":"Division of Computer and Network Systems","doi-asserted-by":"publisher","award":["CSR-0720566CCF-0702344CCF-0448313"],"award-info":[{"award-number":["CSR-0720566CCF-0702344CCF-0448313"]}],"id":[{"id":"10.13039\/100000144","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000143","name":"Division of Computing and Communication Foundations","doi-asserted-by":"publisher","award":["CSR-0720566CCF-0702344CCF-0448313"],"award-info":[{"award-number":["CSR-0720566CCF-0702344CCF-0448313"]}],"id":[{"id":"10.13039\/100000143","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2009,12,12]]},"DOI":"10.1145\/1669112.1669168","type":"proceedings-article","created":{"date-parts":[[2009,12,21]],"date-time":"2009-12-21T15:04:58Z","timestamp":1261407898000},"page":"435-446","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":55,"title":["Tribeca"],"prefix":"10.1145","author":[{"given":"Meeta S.","family":"Gupta","sequence":"first","affiliation":[{"name":"Harvard University, Cambridge, MA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jude A.","family":"Rivers","sequence":"additional","affiliation":[{"name":"IBM T.J Watson Research Center, Yorktown Heights, NY"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Pradip","family":"Bose","sequence":"additional","affiliation":[{"name":"IBM T.J Watson Research Center, Yorktown Heights, NY"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Gu-Yeon","family":"Wei","sequence":"additional","affiliation":[{"name":"Harvard University, Cambridge, MA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"David","family":"Brooks","sequence":"additional","affiliation":[{"name":"Harvard University, Cambridge, MA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2009,12,12]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.5555\/320080.320111"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/775832.775920"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2008.4523227"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/40.888701"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/360128.360139"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2006.1598108"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.5555\/956417.956571"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2007.4437560"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/PACT.2007.52"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2008.4658654"},{"key":"e_1_3_2_1_11_1","volume-title":"Symposium on VLSI Circuits","author":"Gutnik V.","year":"2000","unstructured":"V. Gutnik and A. Chandrakasan . On-chip picosecond time measurement . In Symposium on VLSI Circuits , 2000 . V. Gutnik and A. Chandrakasan. On-chip picosecond time measurement. In Symposium on VLSI Circuits, 2000."},{"key":"e_1_3_2_1_12_1","volume-title":"Modelling of Power Distribution Systems for High-Performance Microprocessors","author":"Herell D.","year":"1999","unstructured":"D. Herell and B. Becker . Modelling of Power Distribution Systems for High-Performance Microprocessors . In IEEE TAP , 1999 . D. Herell and B. Becker. Modelling of Power Distribution Systems for High-Performance Microprocessors. In IEEE TAP, 1999."},{"volume-title":"Process integration, devices and structures","year":"2007","key":"e_1_3_2_1_13_1","unstructured":"International Technology Roadmap for Semiconductors. Process integration, devices and structures , 2007 . International Technology Roadmap for Semiconductors. Process integration, devices and structures, 2007."},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.5555\/525424.822668"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.5555\/822080.822802"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"crossref","unstructured":"K. Kanda etal Design impact of positive temperature dependence on drain current in sub- 1-V CMOS VLSIs. JSSC 36.  K. Kanda et al. Design impact of positive temperature dependence on drain current in sub- 1-V CMOS VLSIs. JSSC 36.","DOI":"10.1109\/4.953485"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1147\/rd.516.0639"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.27"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1147\/rd.516.0763"},{"key":"e_1_3_2_1_20_1","volume-title":"Dec.","author":"Merchant A. A.","year":"2000","unstructured":"A. A. Merchant , D. J. Sagger , and D. D. Boggs . Computer processor with a replay system. United States Patent 6,163,838 , Dec. 2000 . A. A. Merchant, D. J. Sagger, and D. D. Boggs. Computer processor with a replay system. United States Patent 6,163,838, Dec. 2000."},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2007.4418914"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/871506.871562"},{"key":"e_1_3_2_1_23_1","volume-title":"HPCA","author":"Reddi V. J.","year":"2009","unstructured":"V. J. Reddi Voltage Emergency Prediction: A Signature-Based Approach To Reducing Voltage Emergencies . In HPCA , 2009 . V. J. Reddi et al. Voltage Emergency Prediction: A Signature-Based Approach To Reducing Voltage Emergencies. In HPCA, 2009."},{"key":"e_1_3_2_1_24_1","volume-title":"Artificial Intelligence: A Modern Approach","author":"Russell S. J.","year":"2003","unstructured":"S. J. Russell and P. Norvig . Artificial Intelligence: A Modern Approach . Prentice Hall , second edition, 2003 . S. J. Russell and P. Norvig. Artificial Intelligence: A Modern Approach. Prentice Hall, second edition, 2003."},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2008.4771810"},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1109\/TSM.2007.913186"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1145\/1168857.1168868"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/859618.859620"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1109\/12.54848"},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.27"},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2007.373409"},{"key":"e_1_3_2_1_33_1","volume-title":"ASGI","author":"Vera X.","year":"2006","unstructured":"X. Vera , O. Unsal , and A. Gonzalez . X-Pipe: An Adaptive Resilient Microarchitecture for Parameter Variations . In ASGI , 2006 . X. Vera, O. Unsal, and A. Gonzalez. X-Pipe: An Adaptive Resilient Microarchitecture for Parameter Variations. In ASGI, 2006."},{"key":"e_1_3_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.5555\/647882.738066"}],"event":{"name":"Micro-42: The 42nd Annual IEEE\/ACM International Symposium on Microarchitecture","sponsor":["SIGMICRO ACM Special Interest Group on Microarchitectural Research and Processing","IEEE-CS TG u-Arch"],"location":"New York New York","acronym":"Micro-42"},"container-title":["Proceedings of the 42nd Annual IEEE\/ACM International Symposium on Microarchitecture"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1669112.1669168","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1669112.1669168","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T12:40:57Z","timestamp":1750250457000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1669112.1669168"}},"subtitle":["design for PVT variations with local recovery and fine-grained adaptation"],"short-title":[],"issued":{"date-parts":[[2009,12,12]]},"references-count":33,"alternative-id":["10.1145\/1669112.1669168","10.1145\/1669112"],"URL":"https:\/\/doi.org\/10.1145\/1669112.1669168","relation":{},"subject":[],"published":{"date-parts":[[2009,12,12]]},"assertion":[{"value":"2009-12-12","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}