{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:33:00Z","timestamp":1750307580119,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":17,"publisher":"ACM","license":[{"start":{"date-parts":[[2010,2,21]],"date-time":"2010-02-21T00:00:00Z","timestamp":1266710400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2010,2,21]]},"DOI":"10.1145\/1723112.1723157","type":"proceedings-article","created":{"date-parts":[[2010,2,23]],"date-time":"2010-02-23T15:35:30Z","timestamp":1266939330000},"page":"263-272","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["The impact of interconnect architecture on via-programmed structured ASICs (VPSAs)"],"prefix":"10.1145","author":[{"given":"Usman","family":"Ahmed","sequence":"first","affiliation":[{"name":"University of British Columbia, Vancouver, BC, Canada"}],"role":[{"role":"author","vocab":"crossref"}]},{"given":"Guy G.F.","family":"Lemieux","sequence":"additional","affiliation":[{"name":"University of British Columbia, Vancouver, BC, Canada"}],"role":[{"role":"author","vocab":"crossref"}]},{"given":"Steven J.E.","family":"Wilton","sequence":"additional","affiliation":[{"name":"University of British Columbia, Vancouver, BC, Canada"}],"role":[{"role":"author","vocab":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2010,2,21]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"http:\/\/www.eetimes.com\/showArticle.jhtml?articleID=217200925.  http:\/\/www.eetimes.com\/showArticle.jhtml?articleID=217200925."},{"key":"e_1_3_2_1_2_1","unstructured":"Nextreme Structured ASIC eASIC Corp. http:\/\/www.easic.com\/pdf\/asic\/nextreme_asic_structured_asic.pdf.  Nextreme Structured ASIC eASIC Corp. http:\/\/www.easic.com\/pdf\/asic\/nextreme_asic_structured_asic.pdf."},{"key":"e_1_3_2_1_3_1","unstructured":"Hardcopy II Datasheet Altera Corp. http:\/\/www.altera.com\/literature\/hb\/hrd\/hc_h5v1_05.pdf.  Hardcopy II Datasheet Altera Corp. http:\/\/www.altera.com\/literature\/hb\/hrd\/hc_h5v1_05.pdf."},{"key":"e_1_3_2_1_4_1","unstructured":"The Advent of Next Generation Lithography Technologies in Advanced Semiconductor Processing Frost & Sullivan Press Release Aug. 27 2007.  The Advent of Next Generation Lithography Technologies in Advanced Semiconductor Processing Frost & Sullivan Press Release Aug. 27 2007."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2009.5377654"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.5555\/553523"},{"volume-title":"Keynote Address at Int'l Conf. on Field Programmable Technologies (IC-FPT)","year":"2007","author":"Kaptanoglu S.","key":"e_1_3_2_1_7_1"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996625"},{"volume-title":"DATE","year":"2004","author":"Koorapaty A.","key":"e_1_3_2_1_9_1"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2006.884574"},{"key":"e_1_3_2_1_11_1","unstructured":"Z. Or-Bach. Paradigm shift in ASIC technology: In-standard metal out-standard cell. eASIC White Paper September 2005.  Z. Or-Bach. Paradigm shift in ASIC technology: In-standard metal out-standard cell. eASIC White Paper September 2005."},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/775832.776031"},{"key":"e_1_3_2_1_13_1","first-page":"25","volume-title":"ICCAD","author":"Ran Y.","year":"2005"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2006.884051"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.5555\/1326073.1326175"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/1055137.1055184"},{"volume-title":"ICCD, page","year":"2003","author":"Zahiri B.","key":"e_1_3_2_1_17_1"}],"event":{"name":"FPGA '10: ACM\/SIGDA International Symposium on Field Programmable Gate Arrays","sponsor":["SIGDA ACM Special Interest Group on Design Automation"],"location":"Monterey California USA","acronym":"FPGA '10"},"container-title":["Proceedings of the 18th annual ACM\/SIGDA international symposium on Field programmable gate arrays"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1723112.1723157","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1723112.1723157","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T12:41:15Z","timestamp":1750250475000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1723112.1723157"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,2,21]]},"references-count":17,"alternative-id":["10.1145\/1723112.1723157","10.1145\/1723112"],"URL":"https:\/\/doi.org\/10.1145\/1723112.1723157","relation":{},"subject":[],"published":{"date-parts":[[2010,2,21]]},"assertion":[{"value":"2010-02-21","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}