{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,7]],"date-time":"2026-07-07T15:47:21Z","timestamp":1783439241880,"version":"3.54.6"},"publisher-location":"New York, NY, USA","reference-count":16,"publisher":"ACM","license":[{"start":{"date-parts":[[2010,2,26]],"date-time":"2010-02-26T00:00:00Z","timestamp":1267142400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2010,2,26]]},"DOI":"10.1145\/1741906.1742106","type":"proceedings-article","created":{"date-parts":[[2010,3,30]],"date-time":"2010-03-30T08:32:28Z","timestamp":1269937948000},"page":"868-873","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":3,"title":["Serializing the data bus of the Sun OpenSPARC T1 microprocessor datapath for reduced power consumption"],"prefix":"10.1145","author":[{"given":"R. K.","family":"Megalingam","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"V.","family":"Krishnan","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"M.","family":"Nair","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"V.","family":"Sarma","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"R.","family":"Srikumar","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2010,2,26]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICPPW.2009.46"},{"key":"e_1_3_2_1_2_1","unstructured":"OpenSPARC T1 Microarchitecture Specification Sun Microsystems 2006."},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2005.80"},{"key":"e_1_3_2_1_4_1","unstructured":"Maged Ghoneima Yehea Ismail Muhammad Khellah James Tschanz and Vivek De \"Serial-Link Bus: A Low-Power On-Chip Bus Architecture 0-7803-9254-X\/05"},{"key":"e_1_3_2_1_5_1","unstructured":"Beom Seon Ryu Jung Sok Yi Kie Young Lee And Tae Won Cho \"A Design Of Low Power 16-B ALU\" 1999 IEEE TENCON 0-7803-5739-6\/9"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/EUC.2008.81"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.5555\/1457443"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/224081.224120"},{"key":"e_1_3_2_1_9_1","volume-title":"Computer system architecture","unstructured":"Computer system architecture, Third edition, M. Moris Mano."},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.5555\/1200662"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.5555\/882452.874337"},{"key":"e_1_3_2_1_12_1","unstructured":"Enoch Hwang Frank Vahid Yu-Chin Hsu \"FSMD Functional Partitioning for Low Power\""},{"key":"e_1_3_2_1_13_1","unstructured":"Reducing Power Requirements of Instruction Scheduling Through Dynamic Allocation of Multiple Datapath Resources. Dmitry Ponomarev Gurhan Kucuk Kanad Ghose 1072--4451\/01"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2006.23"},{"key":"e_1_3_2_1_15_1","volume-title":"proceedings of ICCSIT '2009","author":"Megalingam Rajesh Kannan","unstructured":"Rajesh Kannan Megalingam, Shekhil Hassan, Vivek P, Ashwin Mohan, Tanmay Rao M, \"Power Consumption Reduction in CPU Datapath using Novel Clocking Scheme\". In proceedings of ICCSIT '2009"},{"key":"e_1_3_2_1_16_1","unstructured":"Norman Yeung Barbara Zivkov Gulbin Ezer Unified Datapath: An Innovative Approach to the Design of a Low-Cost Low-Power High Performance Microprocessor 1063--6390\/94"}],"event":{"name":"ICWET '10: International Conference and Workshop on Emerging Trends in Technology","location":"Mumbai Maharashtra India","acronym":"ICWET '10","sponsor":["AICTE All India Council for Technical Education","UNITECH Unitech Engineers, India","SIGAI ACM Special Interest Group on Artificial Intelligence","SIGARCH ACM Special Interest Group on Computer Architecture"]},"container-title":["Proceedings of the International Conference and Workshop on Emerging Trends in Technology"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1741906.1742106","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1741906.1742106","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,5,17]],"date-time":"2026-05-17T22:48:24Z","timestamp":1779058104000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1741906.1742106"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,2,26]]},"references-count":16,"alternative-id":["10.1145\/1741906.1742106","10.1145\/1741906"],"URL":"https:\/\/doi.org\/10.1145\/1741906.1742106","relation":{},"subject":[],"published":{"date-parts":[[2010,2,26]]},"assertion":[{"value":"2010-02-26","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}