{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:32:53Z","timestamp":1750307573906,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":19,"publisher":"ACM","license":[{"start":{"date-parts":[[2010,2,26]],"date-time":"2010-02-26T00:00:00Z","timestamp":1267142400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2010,2,26]]},"DOI":"10.1145\/1741906.1742136","type":"proceedings-article","created":{"date-parts":[[2010,3,30]],"date-time":"2010-03-30T12:32:28Z","timestamp":1269952348000},"page":"986-990","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["Design and analysis of a hybrid encoded low power multiplier with reduced transition activity technique"],"prefix":"10.1145","author":[{"given":"S.","family":"Saravanan","sequence":"first","affiliation":[{"name":"K.S.R. College of Technology, Tiruchengode, India"}]},{"given":"M.","family":"Madheswaran","sequence":"additional","affiliation":[{"name":"Muthayammal Engineering College, Rasipuram, India"}]}],"member":"320","published-online":{"date-parts":[[2010,2,26]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/92.845895"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/82.996055"},{"key":"e_1_3_2_1_3_1","volume-title":"Norwell, MA: Kluwer.","author":"Chandrakasan A. P.","year":"1995","unstructured":"Chandrakasan , A. P. , and Brodersen , R. W . 1995 . Low Power Digital CMOS Design . Norwell, MA: Kluwer. Chandrakasan, A. P., and Brodersen, R. W. 1995. Low Power Digital CMOS Design. Norwell, MA: Kluwer."},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2005.848806"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.899242"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2003.809138"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2003.810788"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/344166.344549"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICVD.2005.85"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1049\/el:20040088"},{"key":"e_1_3_2_1_11_1","first-page":"867","volume-title":"Proceeding of 35th Asilomar Conference on Signal, Systems &amp; Computer.","author":"Huang Z.","unstructured":"Huang , Z. , and Ercegovac , M. D . 2001. On signal-gating schemes for low power adders . Proceeding of 35th Asilomar Conference on Signal, Systems &amp; Computer. pp. 867 -- 871 . Huang, Z., and Ercegovac, M. D. 2001. On signal-gating schemes for low power adders. Proceeding of 35th Asilomar Conference on Signal, Systems &amp; Computer. pp. 867--871."},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2005.51"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/92.386232"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/92.988727"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/4.84935"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/SIPS.1999.822379"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1049\/el:20050464"},{"key":"e_1_3_2_1_18_1","volume-title":"Reading, MA: Addison-Wesley","author":"Weste N.","year":"1993","unstructured":"Weste , N. , and Eshraghian , K . 1993 . Principles of CMOS VLSI Design, A System Perspective . Reading, MA: Addison-Wesley Weste, N., and Eshraghian, K. 1993. Principles of CMOS VLSI Design, A System Perspective. Reading, MA: Addison-Wesley"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/4.133177"}],"event":{"name":"ICWET '10: International Conference and Workshop on Emerging Trends in Technology","sponsor":["UNITECH Unitech Engineers, India","AICTE All India Council for Technical Education","SIGAI ACM Special Interest Group on Artificial Intelligence","SIGARCH ACM Special Interest Group on Computer Architecture"],"location":"Mumbai Maharashtra India","acronym":"ICWET '10"},"container-title":["Proceedings of the International Conference and Workshop on Emerging Trends in Technology"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1741906.1742136","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1741906.1742136","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T12:41:06Z","timestamp":1750250466000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1741906.1742136"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,2,26]]},"references-count":19,"alternative-id":["10.1145\/1741906.1742136","10.1145\/1741906"],"URL":"https:\/\/doi.org\/10.1145\/1741906.1742136","relation":{},"subject":[],"published":{"date-parts":[[2010,2,26]]},"assertion":[{"value":"2010-02-26","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}