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In this article we focus on the practical aspects of the Rings design on a reconfigurable logic platform and determine their implications on the earlier analysis framework. We make recommendations for avoiding pitfalls in real-life implementations by considering ring interaction, transistor-level effects, narrow signal rejection, transmission line attenuation, and sampler bias. Furthermore, we present experimental results showing that changing operating conditions such as the power supply voltage or the operating temperature may affect the output quality when the signal is subsampled. Hence, an attacker may shift the operating point via a simple noninvasive influence and easily bias the TRNG output. Finally, we propose modifications to the design which significantly improve its robustness against attacks, alleviate implementation-related problems, and simultaneously improve its area, throughput, and power performance.<\/jats:p>","DOI":"10.1145\/1754386.1754390","type":"journal-article","created":{"date-parts":[[2010,6,22]],"date-time":"2010-06-22T12:20:45Z","timestamp":1277209245000},"page":"1-30","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":24,"title":["Improving the Robustness of Ring Oscillator TRNGs"],"prefix":"10.1145","volume":"3","author":[{"given":"Sang-Kyung","family":"Yoo","sequence":"first","affiliation":[{"name":"The Attached Institute of ETRI"}]},{"given":"Deniz","family":"Karakoyunlu","sequence":"additional","affiliation":[{"name":"Worcester Polytechnic Institute"}]},{"given":"Berk","family":"Birand","sequence":"additional","affiliation":[{"name":"Worcester Polytechnic Institute"}]},{"given":"Berk","family":"Sunar","sequence":"additional","affiliation":[{"name":"Worcester Polytechnic Institute"}]}],"member":"320","published-online":{"date-parts":[[2010,5]]},"reference":[{"volume-title":"Proceedings of the Workshop on Cryptographic Hardware and Embedded Systems (CHES\u201999)","author":"Bagini V.","key":"e_1_2_1_1_1","unstructured":"Bagini , V. and Bucci , M . 1999. A design of reliable true random number generator for cryptographic applications . In Proceedings of the Workshop on Cryptographic Hardware and Embedded Systems (CHES\u201999) . \u00c7. K. Ko\u00e7 and C. Paar, Eds. Springer-Verlag, 204--218. Bagini, V. and Bucci, M. 1999. A design of reliable true random number generator for cryptographic applications. In Proceedings of the Workshop on Cryptographic Hardware and Embedded Systems (CHES\u201999). \u00c7. K. Ko\u00e7 and C. Paar, Eds. Springer-Verlag, 204--218."},{"volume-title":"Proceedings of the Workshop on Cryptographic Hardware and Embedded Systems (CHES\u201903)","author":"Barak B.","key":"e_1_2_1_2_1","unstructured":"Barak , B. , Shaltiel , R. , and Tomer , E . 2003. True random number generators secure in a changing environment . In Proceedings of the Workshop on Cryptographic Hardware and Embedded Systems (CHES\u201903) . C. Walter, \u00c7. K. Ko\u00e7, and C. Paar, Eds. Springer-Verlag, 166--180. Barak, B., Shaltiel, R., and Tomer, E. 2003. True random number generators secure in a changing environment. In Proceedings of the Workshop on Cryptographic Hardware and Embedded Systems (CHES\u201903). C. Walter, \u00c7. K. Ko\u00e7, and C. Paar, Eds. Springer-Verlag, 166--180."},{"key":"e_1_2_1_3_1","unstructured":"BSI. 2001. Anwendungshinweise und interpretationen zum schema (AIS 32). Tech. rep. Bundesamt f\u00fcr Sicherheit in der Informationstechnik. Version 1.  BSI. 2001. Anwendungshinweise und interpretationen zum schema (AIS 32). Tech. rep. Bundesamt f\u00fcr Sicherheit in der Informationstechnik. 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