{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:30:09Z","timestamp":1750307409762,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":18,"publisher":"ACM","license":[{"start":{"date-parts":[[2010,5,16]],"date-time":"2010-05-16T00:00:00Z","timestamp":1273968000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2010,5,16]]},"DOI":"10.1145\/1785481.1785526","type":"proceedings-article","created":{"date-parts":[[2010,5,18]],"date-time":"2010-05-18T13:46:25Z","timestamp":1274190385000},"page":"173-178","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["Dominant critical gate identification for power and yield optimization in logic circuits"],"prefix":"10.1145","author":[{"given":"Mihir","family":"Choudhury","sequence":"first","affiliation":[{"name":"ECE Dept, Rice University, Houston, TX, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Masoud","family":"Rostami","sequence":"additional","affiliation":[{"name":"ECE Dept, Rice University, Houston, TX, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kartik","family":"Mohanram","sequence":"additional","affiliation":[{"name":"ECE Dept, Rice University, Houston, TX, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2010,5,16]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/775832.775920"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2006.885683"},{"key":"e_1_3_2_1_3_1","volume-title":"Statistical analysis and optimization for VLSI: Timing and power","author":"Srivastava A.","year":"2006","unstructured":"A. Srivastava , D. Sylvester , and D. Blaauw , Statistical analysis and optimization for VLSI: Timing and power . New York, NY : Springer , 2006 . A. Srivastava, D. Sylvester, and D. Blaauw, Statistical analysis and optimization for VLSI: Timing and power. New York, NY: Springer, 2006."},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2007.92"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"crossref","first-page":"352","DOI":"10.1109\/ASPDAC.2008.4483973","volume-title":"Asia and South Pacific Design Automation Conference","author":"Luo T.","year":"2008","unstructured":"T. Luo power optimization combining placement, sizing and multi-VTT through slack distribution management,\" in Proc . Asia and South Pacific Design Automation Conference , pp. 352 -- 357 , 2008 . T. Luo et al., \"Total power optimization combining placement, sizing and multi-VTT through slack distribution management,\" in Proc. Asia and South Pacific Design Automation Conference, pp. 352--357, 2008."},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2004.1382612"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/1120725.1120881"},{"key":"e_1_3_2_1_8_1","first-page":"705","volume-title":"Intl. Conference Computer-aided Design","author":"Shah S.","year":"2005","unstructured":"S. Shah VTT assignment and gate sizing using a self-snapping continuous formulation,\" in Proc . Intl. Conference Computer-aided Design , pp. 705 -- 712 , 2005 . S. Shah et al., \"Discrete VTT assignment and gate sizing using a self-snapping continuous formulation,\" in Proc. Intl. Conference Computer-aided Design, pp. 705--712, 2005."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/871506.871545"},{"key":"e_1_3_2_1_10_1","first-page":"1","volume-title":"Design Automation and Test in Europe","author":"Wane F.","year":"2007","unstructured":"F. Wane novel criticality computation method in statistical timing analysis,\" in Proc . Design Automation and Test in Europe , pp. 1 -- 6 , 2007 . F. Wane et al., \"A novel criticality computation method in statistical timing analysis,\" in Proc. Design Automation and Test in Europe, pp. 1--6, 2007."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/1403375.1403652"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.923241"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2009.2013278"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/1403375.1403502"},{"key":"e_1_3_2_1_15_1","unstructured":"\"Predictive Technology Model (PTM).\" Please visit the URL http:\/\/www.eas.asu.edu\/ ptm\/ for further details. \"Predictive Technology Model (PTM).\" Please visit the URL http:\/\/www.eas.asu.edu\/ ptm\/ for further details."},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1287\/opre.1050.0254"},{"key":"e_1_3_2_1_17_1","unstructured":"\"CAPO Place and Route tool.\" Please visit the http:\/\/vlsicad.eecs.umich.edu\/BK\/PDtools\/ for further details. \"CAPO Place and Route tool.\" Please visit the http:\/\/vlsicad.eecs.umich.edu\/BK\/PDtools\/ for further details."},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/1065579.1065716"}],"event":{"name":"GLSVLSI '10: Great Lakes Symposium on VLSI 2010","sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEEE CEDA","IEEE CASS"],"location":"Providence Rhode Island USA","acronym":"GLSVLSI '10"},"container-title":["Proceedings of the 20th symposium on Great lakes symposium on VLSI"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1785481.1785526","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1785481.1785526","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T11:39:31Z","timestamp":1750246771000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1785481.1785526"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,5,16]]},"references-count":18,"alternative-id":["10.1145\/1785481.1785526","10.1145\/1785481"],"URL":"https:\/\/doi.org\/10.1145\/1785481.1785526","relation":{},"subject":[],"published":{"date-parts":[[2010,5,16]]},"assertion":[{"value":"2010-05-16","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}