{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,10]],"date-time":"2026-04-10T01:52:48Z","timestamp":1775785968855,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":33,"publisher":"ACM","license":[{"start":{"date-parts":[[2010,6,6]],"date-time":"2010-06-06T00:00:00Z","timestamp":1275782400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2010,6,6]]},"DOI":"10.1145\/1807167.1807206","type":"proceedings-article","created":{"date-parts":[[2010,6,8]],"date-time":"2010-06-08T12:37:34Z","timestamp":1276000654000},"page":"339-350","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":228,"title":["FAST"],"prefix":"10.1145","author":[{"given":"Changkyu","family":"Kim","sequence":"first","affiliation":[{"name":"Intel Corporation, Santa Clara, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jatin","family":"Chhugani","sequence":"additional","affiliation":[{"name":"Intel Corporation, Santa Clara, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Nadathur","family":"Satish","sequence":"additional","affiliation":[{"name":"Intel Corporation, Santa Clara, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Eric","family":"Sedlar","sequence":"additional","affiliation":[{"name":"Oracle Corporation, Redwood Shores, WA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Anthony D.","family":"Nguyen","sequence":"additional","affiliation":[{"name":"Intel Corporation, Santa Clara, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tim","family":"Kaldewey","sequence":"additional","affiliation":[{"name":"Oracle Corporation, Redwood Shores, WA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Victor W.","family":"Lee","sequence":"additional","affiliation":[{"name":"Intel Corporation, Santa Clara, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Scott A.","family":"Brandt","sequence":"additional","affiliation":[{"name":"University of California at Santa Cruz, Santa Cruz, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Pradeep","family":"Dubey","sequence":"additional","affiliation":[{"name":"Intel Corporation, Santa Clara, CA, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2010,6,6]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/1142473.1142548"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/1618452.1618500"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/212094.212131"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1007\/s00453-003-1021-x"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/320521.320530"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1137\/1.9781611972894.13"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/1559845.1559877"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/375663.375681"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/376284.375688"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/564691.564710"},{"key":"e_1_3_2_1_11_1","volume-title":"Efficient implementation of sorting on multi-core SIMD CPU architecture. PVLDB, 1(2)","author":"Chhugani J.","year":"2008","unstructured":"J. Chhugani , A. D. Nguyen , V.W. Lee , W. Macy , Efficient implementation of sorting on multi-core SIMD CPU architecture. PVLDB, 1(2) , 2008 . J. Chhugani, A. D. Nguyen, V.W. Lee,W. Macy, et al. Efficient implementation of sorting on multi-core SIMD CPU architecture. PVLDB, 1(2), 2008."},{"key":"e_1_3_2_1_12_1","first-page":"339","volume-title":"VLDB","author":"Cieslewicz J.","year":"2007","unstructured":"J. Cieslewicz and K. A. Ross . Adaptive aggregation on chip multiprocessors . In VLDB , pages 339 -- 350 , 2007 . J. Cieslewicz and K. A. Ross. Adaptive aggregation on chip multiprocessors. In VLDB, pages 339--350, 2007."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/356770.356776"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/125187.125200"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.5555\/645483.656226"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.5555\/645484.656370"},{"key":"e_1_3_2_1_17_1","first-page":"22","volume-title":"Applied Computing","author":"Graefe G.","year":"1991","unstructured":"G. Graefe and L. Shapiro . Data compression and database performance . In Applied Computing , pages 22 -- 27 , Apr 1991 . G. Graefe and L. Shapiro. Data compression and database performance. In Applied Computing, pages 22--27, Apr 1991."},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/885651.781063"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/1247480.1247525"},{"key":"e_1_3_2_1_20_1","first-page":"695","volume-title":"VLDB","author":"Iyer B. R.","year":"1994","unstructured":"B. R. Iyer and D. Wilhite . Data compression support in databases . In VLDB , pages 695 -- 704 , 1994 . B. R. Iyer and D. Wilhite. Data compression support in databases. In VLDB, pages 695--704, 1994."},{"key":"e_1_3_2_1_21_1","volume-title":"USENIX Workshop on Hot Topics in Parallelism","author":"Kaldewey T.","year":"2009","unstructured":"T. Kaldewey , J. Hagen , A. D. Blas , and E. Sedlar . Parallel search on video cards . In USENIX Workshop on Hot Topics in Parallelism , 2009 . T. Kaldewey, J. Hagen, A. D. Blas, and E. Sedlar. Parallel search on video cards. In USENIX Workshop on Hot Topics in Parallelism, 2009."},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.14778\/1687553.1687564"},{"key":"e_1_3_2_1_23_1","first-page":"294","volume-title":"VLDB","author":"Lehman T. J.","year":"1986","unstructured":"T. J. Lehman and M. J. Carey . A study of index structures for main memory database management systems . In VLDB , pages 294 -- 303 , 1986 . T. J. Lehman and M. J. Carey. A study of index structures for main memory database management systems. In VLDB, pages 294--303, 1986."},{"key":"e_1_3_2_1_24_1","volume-title":"NVIDIA CUDA Programming Guide 2.3","author":"NVIDIA.","year":"2009","unstructured":"NVIDIA. NVIDIA CUDA Programming Guide 2.3 . 2009 . NVIDIA. NVIDIA CUDA Programming Guide 2.3. 2009."},{"key":"e_1_3_2_1_25_1","first-page":"78","volume-title":"VLDB","author":"Rao J.","year":"1999","unstructured":"J. Rao and K. A. Ross . Cache conscious indexing for decision support in main memory . In VLDB , pages 78 -- 89 , 1999 . J. Rao and K. A. Ross. Cache conscious indexing for decision support in main memory. In VLDB, pages 78--89, 1999."},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1145\/342009.335449"},{"key":"e_1_3_2_1_27_1","volume-title":"HPEC","author":"Reilly M.","year":"2008","unstructured":"M. Reilly . When multicore isn't enough: Trends and the future for multi-multicore systems . In HPEC , 2008 . M. Reilly. When multicore isn't enough: Trends and the future for multi-multicore systems. In HPEC, 2008."},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/1565694.1565705"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/1399504.1360617"},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.14778\/1687627.1687671"},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1145\/564691.564709"},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.5555\/1315451.1315487"},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICDE.2006.150"}],"event":{"name":"SIGMOD\/PODS '10: International Conference on Management of Data","location":"Indianapolis Indiana USA","acronym":"SIGMOD\/PODS '10","sponsor":["SIGMOD ACM Special Interest Group on Management of Data"]},"container-title":["Proceedings of the 2010 ACM SIGMOD International Conference on Management of data"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1807167.1807206","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1807167.1807206","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T12:17:35Z","timestamp":1750249055000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1807167.1807206"}},"subtitle":["fast architecture sensitive tree search on modern CPUs and GPUs"],"short-title":[],"issued":{"date-parts":[[2010,6,6]]},"references-count":33,"alternative-id":["10.1145\/1807167.1807206","10.1145\/1807167"],"URL":"https:\/\/doi.org\/10.1145\/1807167.1807206","relation":{},"subject":[],"published":{"date-parts":[[2010,6,6]]},"assertion":[{"value":"2010-06-06","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}