{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:30:13Z","timestamp":1750307413882,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":19,"publisher":"ACM","license":[{"start":{"date-parts":[[2010,6,13]],"date-time":"2010-06-13T00:00:00Z","timestamp":1276387200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100000143","name":"Division of Computing and Communication Foundations","doi-asserted-by":"publisher","award":["CCF-0917204"],"award-info":[{"award-number":["CCF-0917204"]}],"id":[{"id":"10.13039\/100000143","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2010,6,13]]},"DOI":"10.1145\/1837274.1837414","type":"proceedings-article","created":{"date-parts":[[2010,10,28]],"date-time":"2010-10-28T14:47:40Z","timestamp":1288277260000},"page":"567-572","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":13,"title":["Separatrices in high-dimensional state space"],"prefix":"10.1145","author":[{"given":"Yong","family":"Zhang","sequence":"first","affiliation":[{"name":"Texas A&amp;M University, College Station, TX"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Peng","family":"Li","sequence":"additional","affiliation":[{"name":"Texas A&amp;M University, College Station, TX"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Garng M.","family":"Huang","sequence":"additional","affiliation":[{"name":"Texas A&amp;M University, College Station, TX"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2010,6,13]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"Fault-Tolerance and Reliability Techniques for High-Density Random-Access Memories","author":"Chakraborty K.","year":"2002","unstructured":"K. Chakraborty and P. Mazumder . Fault-Tolerance and Reliability Techniques for High-Density Random-Access Memories . Prentice Hall , 2002 . K. Chakraborty and P. Mazumder. Fault-Tolerance and Reliability Techniques for High-Density Random-Access Memories. Prentice Hall, 2002."},{"volume-title":"Process integration, devices, and structures","year":"2007","key":"e_1_3_2_1_2_1","unstructured":"International technology roadmap for semiconductors : Process integration, devices, and structures . 2007 . International technology roadmap for semiconductors: Process integration, devices, and structures. 2007."},{"key":"e_1_3_2_1_3_1","volume-title":"Worst-case static noise margin criteria for logic circuits and their mathematical equivalence","author":"Lohstroh J.","year":"1983","unstructured":"J. Lohstroh , E. Seevinck , and J. D. Groot . Worst-case static noise margin criteria for logic circuits and their mathematical equivalence . IEEE J. of Solid-State Circuits , sc-18(6):803--806, Dec. 1983 . J. Lohstroh, E. Seevinck, and J. D. Groot. Worst-case static noise margin criteria for logic circuits and their mathematical equivalence. IEEE J. of Solid-State Circuits, sc-18(6):803--806, Dec. 1983."},{"key":"e_1_3_2_1_4_1","volume-title":"Static-noise margin analysis of MOS SRAM cells","author":"Seevinck E.","year":"1987","unstructured":"E. Seevinck , F. J. List , and J. Lohstroh . Static-noise margin analysis of MOS SRAM cells . IEEE J. of Solid-State Circuits , sc-22(5):748--754, Oct. 1987 . E. Seevinck, F. J. List, and J. Lohstroh. Static-noise margin analysis of MOS SRAM cells. IEEE J. of Solid-State Circuits, sc-22(5):748--754, Oct. 1987."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/4.913744"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIR.2004.1356655"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.883344"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.852295"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1146928"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1146930"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.5555\/1266366.1266667"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2007.4405720"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2006.1705289"},{"key":"e_1_3_2_1_14_1","volume-title":"Symp. on VLSI Circuits","author":"Khellah M.","year":"2006","unstructured":"M. Khellah , Y. Ye , N. S. Kim , D. Somasekhar , G. Pandya , A. Farhang , K. Zhang , C. Webb , and V. De . Wordline &amp; bitline pulsing schemes for improving SRAM cell stability in low-vcc 65nm CMOS designs . In Symp. on VLSI Circuits , June 2006 . M. Khellah, Y. Ye, N. S. Kim, D. Somasekhar, G. Pandya, A. Farhang, K. Zhang, C. Webb, and V. De. Wordline &amp; bitline pulsing schemes for improving SRAM cell stability in low-vcc 65nm CMOS designs. In Symp. on VLSI Circuits, June 2006."},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.5555\/1509456.1509544"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/BMAS.2007.4437516"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/9.356"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/1687399.1687476"},{"key":"e_1_3_2_1_19_1","volume-title":"Introduction to Applied Nonlinear Dynamical Systems and Chaos","author":"Wiggins S.","year":"2003","unstructured":"S. Wiggins . Introduction to Applied Nonlinear Dynamical Systems and Chaos . Springer , 2003 . S. Wiggins. Introduction to Applied Nonlinear Dynamical Systems and Chaos. Springer, 2003."}],"event":{"name":"DAC '10: The 47th Annual Design Automation Conference 2010","sponsor":["EDAC Electronic Design Automation Consortium","SIGDA ACM Special Interest Group on Design Automation","IEEE-CEDA"],"location":"Anaheim California","acronym":"DAC '10"},"container-title":["Proceedings of the 47th Design Automation Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1837274.1837414","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1837274.1837414","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T11:39:35Z","timestamp":1750246775000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1837274.1837414"}},"subtitle":["system-theoretical tangent computation and application to SRAM dynamic stability analysis"],"short-title":[],"issued":{"date-parts":[[2010,6,13]]},"references-count":19,"alternative-id":["10.1145\/1837274.1837414","10.1145\/1837274"],"URL":"https:\/\/doi.org\/10.1145\/1837274.1837414","relation":{},"subject":[],"published":{"date-parts":[[2010,6,13]]},"assertion":[{"value":"2010-06-13","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}