{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T11:59:31Z","timestamp":1759147171284,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":11,"publisher":"ACM","license":[{"start":{"date-parts":[[2010,6,13]],"date-time":"2010-06-13T00:00:00Z","timestamp":1276387200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2010,6,13]]},"DOI":"10.1145\/1837274.1837487","type":"proceedings-article","created":{"date-parts":[[2010,10,28]],"date-time":"2010-10-28T14:47:40Z","timestamp":1288277260000},"page":"853-856","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":11,"title":["A statistical simulation method for reliability analysis of SRAM core-cells"],"prefix":"10.1145","author":[{"given":"R. A.","family":"Fonseca","sequence":"first","affiliation":[{"name":"Universit\u00e9 de Montpellier II \/ CNRS, Montpellier Cedex, France"}]},{"given":"L.","family":"Dilillo","sequence":"additional","affiliation":[{"name":"Universit\u00e9 de Montpellier II \/ CNRS, Montpellier Cedex, France"}]},{"given":"A.","family":"Bosio","sequence":"additional","affiliation":[{"name":"Universit\u00e9 de Montpellier II \/ CNRS, Montpellier Cedex, France"}]},{"given":"P.","family":"Girard","sequence":"additional","affiliation":[{"name":"Universit\u00e9 de Montpellier II \/ CNRS, Montpellier Cedex, France"}]},{"given":"S.","family":"Pravossoudovitch","sequence":"additional","affiliation":[{"name":"Universit\u00e9 de Montpellier II \/ CNRS, Montpellier Cedex, France"}]},{"given":"A.","family":"Virazel","sequence":"additional","affiliation":[{"name":"Universit\u00e9 de Montpellier II \/ CNRS, Montpellier Cedex, France"}]},{"given":"N.","family":"Badereddine","sequence":"additional","affiliation":[{"name":"Infineon Technologies France, Sophia-Antipolis, France"}]}],"member":"320","published-online":{"date-parts":[[2010,6,13]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1146928"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1016\/S0168-9274(99)00058-6"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2005.58"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/ESSDER.2006.307687"},{"issue":"4","key":"e_1_3_2_1_5_1","volume":"21","author":"Fischer T.","year":"2008","unstructured":"Fischer , T. Analysis of Read Current and Write Trip Voltage Variability From a 1- MB SRAM Test Structure. Trans. on Semiconductor Manufacturing , vol. 21 , no. 4 , 2008 Fischer, T. et al. Analysis of Read Current and Write Trip Voltage Variability From a 1-MB SRAM Test Structure. Trans. on Semiconductor Manufacturing, vol. 21, no. 4, 2008","journal-title":"MB SRAM Test Structure. Trans. on Semiconductor Manufacturing"},{"key":"e_1_3_2_1_6_1","first-page":"41","author":"Grossar E.","year":"2006","unstructured":"Grossar , E. , Stucchi , M. , Maex , K. and Dehaene , W. Read Stability and Write-Ability Analysis of SRAM Cells for Nanometer Technologies. IEEE J SSC , v . 41 , no. 11, 2006 . Grossar, E., Stucchi, M., Maex, K. and Dehaene, W. Read Stability and Write-Ability Analysis of SRAM Cells for Nanometer Technologies. IEEE J SSC, v. 41, no. 11, 2006.","journal-title":"Read Stability and Write-Ability Analysis of SRAM Cells for Nanometer Technologies. IEEE J SSC"},{"key":"e_1_3_2_1_7_1","volume-title":"Art of Computer Programming: Seminumerical Algorithms","author":"Knuth D. E.","year":"1997","unstructured":"Knuth , D. E. Art of Computer Programming: Seminumerical Algorithms . Vol. 2 , Addison-Wesley Professional , 1997 . Knuth, D. E. Art of Computer Programming: Seminumerical Algorithms. Vol. 2, Addison-Wesley Professional, 1997."},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.5555\/1051451"},{"issue":"5","key":"e_1_3_2_1_9_1","author":"Seevinck E.","year":"1987","unstructured":"Seevinck , E. , List , F. and Lohstroh , J. Static-Noise Margin Analysis of MOS SRAM Cells. IEEE JSSC , no. 5 , 1987 . Seevinck, E., List, F. and Lohstroh, J. Static-Noise Margin Analysis of MOS SRAM Cells. IEEE JSSC, no. 5, 1987.","journal-title":"J. Static-Noise Margin Analysis of MOS SRAM Cells. IEEE JSSC"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.5555\/1266366.1266667"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1630041"}],"event":{"name":"DAC '10: The 47th Annual Design Automation Conference 2010","sponsor":["EDAC Electronic Design Automation Consortium","SIGDA ACM Special Interest Group on Design Automation","IEEE-CEDA"],"location":"Anaheim California","acronym":"DAC '10"},"container-title":["Proceedings of the 47th Design Automation Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1837274.1837487","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1837274.1837487","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T11:23:10Z","timestamp":1750245790000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1837274.1837487"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,6,13]]},"references-count":11,"alternative-id":["10.1145\/1837274.1837487","10.1145\/1837274"],"URL":"https:\/\/doi.org\/10.1145\/1837274.1837487","relation":{},"subject":[],"published":{"date-parts":[[2010,6,13]]},"assertion":[{"value":"2010-06-13","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}