{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,13]],"date-time":"2026-06-13T17:09:16Z","timestamp":1781370556138,"version":"3.54.1"},"publisher-location":"New York, NY, USA","reference-count":13,"publisher":"ACM","license":[{"start":{"date-parts":[[2010,8,18]],"date-time":"2010-08-18T00:00:00Z","timestamp":1282089600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2010,8,18]]},"DOI":"10.1145\/1840845.1840931","type":"proceedings-article","created":{"date-parts":[[2010,8,19]],"date-time":"2010-08-19T13:15:15Z","timestamp":1282223715000},"page":"389-394","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":81,"title":["An energy efficient cache design using spin torque transfer (STT) RAM"],"prefix":"10.1145","author":[{"given":"Mitchelle","family":"Rasquinha","sequence":"first","affiliation":[{"name":"Georgia Institute of Technology, Atlanta, GA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Dhruv","family":"Choudhary","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology, Atlanta, GA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Subho","family":"Chatterjee","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology, Atlanta, GA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Saibal","family":"Mukhopadhyay","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology, Atlanta, GA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Sudhakar","family":"Yalamanchili","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology, Atlanta, GA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2010,8,18]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"Proceedings of the 15th international Conference on High Performance Computing","author":"Ramaswamy S.","year":"2008","unstructured":"Ramaswamy , S. and Yalamanchili , S . 2008. An utilization driven framework for energy efficient caches . In Proceedings of the 15th international Conference on High Performance Computing ( Bangalore, India, December 17 - 20 , 2008 ). P. Sadayappan, M. Parashar, R. Badrinath, and V. K. Prasanna, Eds. Lecture Notes In Computer Science. Springer-Verlag, Berlin, Heidelberg, 583--594. Ramaswamy, S. and Yalamanchili, S. 2008. An utilization driven framework for energy efficient caches. In Proceedings of the 15th international Conference on High Performance Computing (Bangalore, India, December 17 - 20, 2008). P. Sadayappan, M. Parashar, R. Badrinath, and V. K. Prasanna, Eds. Lecture Notes In Computer Science. Springer-Verlag, Berlin, Heidelberg, 583--594."},{"key":"e_1_3_2_1_2_1","first-page":"737","volume-title":"Automation & Test in Europe Conference & Exhibition, 2009. DATE '09., vol., no.","author":"Xiaoxia Wu","unstructured":"Xiaoxia Wu ; Jian Li; Lixin Zhang; Speight, E.; Yuan Xie ;, \" Power and performance of read-write aware Hybrid Caches with non-volatile memories,\" Design , Automation & Test in Europe Conference & Exhibition, 2009. DATE '09., vol., no. , pp. 737 -- 742 , 20--24 April 20 0. Xiaoxia Wu; Jian Li; Lixin Zhang; Speight, E.; Yuan Xie;, \"Power and performance of read-write aware Hybrid Caches with non-volatile memories,\" Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09., vol., no., pp.737--742, 20--24 April 200."},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555761"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/1687399.1687448"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555760"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555758"},{"key":"e_1_3_2_1_7_1","first-page":"459","volume-title":"spin-ram,\" Electron Devices Meeting","author":"Hosomi M.","year":"2005","unstructured":"Hosomi , M. ; Yamagishi , H. ; Yamamoto , T. ; Bessho , K. ; Higo , Y. ; Yamane , K. ; Yamada , H. ; Shoji , M. ; Hachino , H. ; Fukumoto , C. ; Nagao , H. ; Kano , H. ;, \"A novel nonvolatile memory with spin torque transfer magnetization switching : spin-ram,\" Electron Devices Meeting , 2005 . IEDM Technical Digest. IEEE International , vol., no., pp. 459 -- 462 , 5--5 Dec. 200. Hosomi, M.; Yamagishi, H.; Yamamoto, T.; Bessho, K.; Higo, Y.; Yamane, K.; Yamada, H.; Shoji, M.; Hachino, H.; Fukumoto, C.; Nagao, H.; Kano, H.;, \"A novel nonvolatile memory with spin torque transfer magnetization switching: spin-ram,\" Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International, vol., no., pp.459--462, 5--5 Dec. 200."},{"key":"e_1_3_2_1_8_1","first-page":"1","volume-title":"IEDM '06","author":"Leuschner R.","unstructured":"Leuschner , R. ; Klostermann , U.K. ; Park , H. ; Dahmani , F. ; Dittrich , R. ; Grigis , C. ; Hernan , K. ; Mege , S. ; Park , C. ; Clech , M.C. ; Lee , G. Y. ; Bournat , S. ; Altimime , L. ; Mueller , G. ;, \" Thermal Select MRAM with a 2-bit Cell Capability for beyond 65 nm Technology Node,\" Electron Devices Meeting, 2006 . IEDM '06 . International, vol., no. , pp. 1 -- 4 , 11--13 Dec. 200. Leuschner, R.; Klostermann, U.K.; Park, H.; Dahmani, F.; Dittrich, R.; Grigis, C.; Hernan, K.; Mege, S.; Park, C.; Clech, M.C.; Lee, G. Y.; Bournat, S.; Altimime, L.; Mueller, G.;, \"Thermal Select MRAM with a 2-bit Cell Capability for beyond 65 nm Technology Node,\" Electron Devices Meeting, 2006. IEDM '06. International, vol., no., pp. 1--4, 11--13 Dec. 200."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/1391469.1391610"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2008.2"},{"key":"e_1_3_2_1_11_1","first-page":"53","volume-title":"ISPASS 2009. IEEE International Symposium on, vol., no.","author":"Loh G.H.","unstructured":"Loh , G.H. ; Subramaniam , S. ; Yuejian Xie ;, \" Zesto : A cycle-level simulator for highly detailed microarchitecture exploration,\" Performance Analysis of Systems and Software, 2009 . ISPASS 2009. IEEE International Symposium on, vol., no. , pp. 53 -- 64 , 26--28 April 20 0. Loh, G.H.; Subramaniam, S.; Yuejian Xie;, \"Zesto: A cycle-level simulator for highly detailed microarchitecture exploration,\" Performance Analysis of Systems and Software, 2009. ISPASS 2009. IEEE International Symposium on, vol., no., pp.53--64, 26--28 April 200."},{"key":"e_1_3_2_1_12_1","unstructured":"McCalpin John D.: \"STREAM: Sustainable Memory Bandwidth in High Performance Computers\" a continually updated technical report (1991--2007) available at: \"http:\/\/www.cs.virginia.edu\/stream\/\".  McCalpin John D.: \"STREAM: Sustainable Memory Bandwidth in High Performance Computers\" a continually updated technical report (1991--2007) available at: \"http:\/\/www.cs.virginia.edu\/stream\/\"."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/1061267.1061271"}],"event":{"name":"ISLPED'10: International Symposium on Low Power Electronics and Design","location":"Austin Texas USA","acronym":"ISLPED'10","sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEEE CAS"]},"container-title":["Proceedings of the 16th ACM\/IEEE international symposium on Low power electronics and design"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1840845.1840931","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1840845.1840931","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T12:08:56Z","timestamp":1750248536000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1840845.1840931"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,8,18]]},"references-count":13,"alternative-id":["10.1145\/1840845.1840931","10.1145\/1840845"],"URL":"https:\/\/doi.org\/10.1145\/1840845.1840931","relation":{},"subject":[],"published":{"date-parts":[[2010,8,18]]},"assertion":[{"value":"2010-08-18","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}