{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,25]],"date-time":"2026-04-25T15:08:58Z","timestamp":1777129738314,"version":"3.51.4"},"publisher-location":"New York, NY, USA","reference-count":55,"publisher":"ACM","license":[{"start":{"date-parts":[[2010,8,30]],"date-time":"2010-08-30T00:00:00Z","timestamp":1283126400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2010,8,30]]},"DOI":"10.1145\/1851182.1851207","type":"proceedings-article","created":{"date-parts":[[2010,8,31]],"date-time":"2010-08-31T09:06:04Z","timestamp":1283245564000},"page":"195-206","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":271,"title":["PacketShader"],"prefix":"10.1145","author":[{"given":"Sangjin","family":"Han","sequence":"first","affiliation":[{"name":"KAIST, Daejeon, South Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Keon","family":"Jang","sequence":"additional","affiliation":[{"name":"KAIST, Daejeon, South Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"KyoungSoo","family":"Park","sequence":"additional","affiliation":[{"name":"KAIST, Daejeon, South Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sue","family":"Moon","sequence":"additional","affiliation":[{"name":"KAIST, Daejeon, South Korea"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2010,8,30]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"AMD Fusion. http:\/\/fusion.amd.com.  AMD Fusion. http:\/\/fusion.amd.com."},{"key":"e_1_3_2_1_2_1","unstructured":"Cavium Networks OCTEON II processors. http:\/\/www.caviumnetworks.com\/OCTEON_II_MIPS64.html.  Cavium Networks OCTEON II processors. http:\/\/www.caviumnetworks.com\/OCTEON_II_MIPS64.html."},{"key":"e_1_3_2_1_3_1","unstructured":"Check Point IP Security Appliances. http:\/\/www.checkpoint.com\/products\/ip-appliances\/index.html.  Check Point IP Security Appliances. http:\/\/www.checkpoint.com\/products\/ip-appliances\/index.html."},{"key":"e_1_3_2_1_4_1","unstructured":"Cisco QuantumFlow Processors. http:\/\/www.cisco.com\/en\/US\/prod\/collateral\/routers\/ps9343\/solution_over%view_c22--448936.html.  Cisco QuantumFlow Processors. http:\/\/www.cisco.com\/en\/US\/prod\/collateral\/routers\/ps9343\/solution_over%view_c22--448936.html."},{"key":"e_1_3_2_1_5_1","unstructured":"General Purpose computation on GPUs. http:\/\/www.gpgpu.org.  General Purpose computation on GPUs. http:\/\/www.gpgpu.org."},{"key":"e_1_3_2_1_6_1","unstructured":"GNU Zebra project. http:\/\/www.zebra.org.  GNU Zebra project. http:\/\/www.zebra.org."},{"key":"e_1_3_2_1_7_1","unstructured":"NVIDIA CUDA GPU Computing Discussion Forum. http:\/\/forums.nvidia.com\/index.php?showtopic=104243.  NVIDIA CUDA GPU Computing Discussion Forum. http:\/\/forums.nvidia.com\/index.php?showtopic=104243."},{"key":"e_1_3_2_1_8_1","unstructured":"NVIDIA Fermi Architecture. http:\/\/www.nvidia.com\/object\/fermi_architecture.html.  NVIDIA Fermi Architecture. http:\/\/www.nvidia.com\/object\/fermi_architecture.html."},{"key":"e_1_3_2_1_9_1","unstructured":"OpenFlow Reference System. http:\/\/www.openflowswitch.org\/wp\/downloads\/.  OpenFlow Reference System. http:\/\/www.openflowswitch.org\/wp\/downloads\/."},{"key":"e_1_3_2_1_10_1","unstructured":"OpenFlow Switch Specification Version 0.8.9. http:\/\/www.openflowswitch.org\/documents\/openflow-spec-v0.8.9.pdf.  OpenFlow Switch Specification Version 0.8.9. http:\/\/www.openflowswitch.org\/documents\/openflow-spec-v0.8.9.pdf."},{"key":"e_1_3_2_1_11_1","unstructured":"Quagga project. http:\/\/www.quagga.net.  Quagga project. http:\/\/www.quagga.net."},{"key":"e_1_3_2_1_12_1","unstructured":"Receive-Side Scaling Enhancements in Windows Server 2008. http:\/\/www.microsoft.com\/whdc\/device\/network\/ndis_rss.mspx.  Receive-Side Scaling Enhancements in Windows Server 2008. http:\/\/www.microsoft.com\/whdc\/device\/network\/ndis_rss.mspx."},{"key":"e_1_3_2_1_13_1","unstructured":"The OpenFlow Switch Consortium. http:\/\/www.openflowswitch.org.  The OpenFlow Switch Consortium. http:\/\/www.openflowswitch.org."},{"key":"e_1_3_2_1_14_1","unstructured":"University of Oregon RouteViews project. http:\/\/www.routeviews.org\/.  University of Oregon RouteViews project. http:\/\/www.routeviews.org\/."},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/1397718.1397725"},{"key":"e_1_3_2_1_16_1","volume-title":"USENIX Summer Technical Conference","author":"Bonwick J.","year":"1994","unstructured":"J. Bonwick . The slab allocator: an object-caching kernel memory allocator . In USENIX Summer Technical Conference , 1994 . J. Bonwick. The slab allocator: an object-caching kernel memory allocator. In USENIX Summer Technical Conference, 1994."},{"key":"e_1_3_2_1_17_1","volume-title":"OSDI","author":"Boyd-Wickizer S.","year":"2008","unstructured":"S. Boyd-Wickizer , H. Chen , R. Chen , Y. Mao , F. Kaashoek , R. Morris , A. Pesterev , L. Stein , M. Wu , Y. Dai , Y. Zhang , and Z. Zhang . Corey: An operating system for many cores . In OSDI , 2008 . S. Boyd-Wickizer, H. Chen, R. Chen, Y. Mao, F. Kaashoek, R. Morris, A. Pesterev, L. Stein, M. Wu, Y. Dai, Y. Zhang, and Z. Zhang. Corey: An operating system for many cores. In OSDI, 2008."},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/1218063.1217961"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/1629575.1629578"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/1400181.1400197"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICON.2004.1409136"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/INFCOM.1998.662938"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/LANMAN.2010.5507157"},{"key":"e_1_3_2_1_24_1","volume-title":"USENIX Security","author":"Harrison O.","year":"2008","unstructured":"O. Harrison and J. Waldron . Practical Symmetric Key Cryptography on Modern Graphics Hardware . In USENIX Security , 2008 . O. Harrison and J. Waldron. Practical Symmetric Key Cryptography on Modern Graphics Hardware. In USENIX Security, 2008."},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555775"},{"key":"e_1_3_2_1_26_1","volume-title":"libpcap","author":"Jacobson V.","unstructured":"V. Jacobson , C. Leres , and S. McCanne . libpcap , Lawrence Berkeley Laboratory , Berkeley, CA . http:\/\/www.tcpdump.org. V. Jacobson, C. Leres, and S. McCanne. libpcap, Lawrence Berkeley Laboratory, Berkeley, CA. http:\/\/www.tcpdump.org."},{"key":"e_1_3_2_1_27_1","unstructured":"K. Jang S. Han S. Moon and K. Park. Converting your graphics card into high-performance SSL accelerator. submitted for publication.  K. Jang S. Han S. Moon and K. Park. Converting your graphics card into high-performance SSL accelerator. submitted for publication."},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/948205.948210"},{"key":"e_1_3_2_1_29_1","first-page":"1791","volume-title":"Computer Graphics Forum","author":"Kim D.","year":"2009","unstructured":"D. Kim , J. Heo , J. Huh , J. Kim , and S. Yoon . HPCCD: Hybrid Parallel Continuous Collision Detection using CPUs and GPUs . In Computer Graphics Forum , volume 28 , pages 1791 -- 1800 . John Wiley & Sons , 2009 . D. Kim, J. Heo, J. Huh, J. Kim, and S. Yoon. HPCCD: Hybrid Parallel Continuous Collision Detection using CPUs and GPUs. In Computer Graphics Forum, volume 28, pages 1791--1800. John Wiley & Sons, 2009."},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1145\/354871.354874"},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1145\/1592648.1592651"},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICSPC.2007.4728256"},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1145\/1355734.1355746"},{"key":"e_1_3_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1145\/263326.263335"},{"key":"e_1_3_2_1_35_1","volume-title":"Automation & Test in Europe Conference & Exhibition (DATE)","author":"Mu S.","year":"2010","unstructured":"S. Mu , X. Zhang , N. Zhang , J. Lu , Y. S. Deng , and S. Zhang . Ip routing processing with graphic processors. In Design , Automation & Test in Europe Conference & Exhibition (DATE) , 2010 . S. Mu, X. Zhang, N. Zhang, J. Lu, Y. S. Deng, and S. Zhang. Ip routing processing with graphic processors. In Design, Automation & Test in Europe Conference & Exhibition (DATE), 2010."},{"key":"e_1_3_2_1_36_1","doi-asserted-by":"publisher","DOI":"10.1145\/1477942.1477944"},{"key":"e_1_3_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1145\/1365490.1365500"},{"key":"e_1_3_2_1_38_1","unstructured":"NVIDIA Corporation. NVIDIA CUDA Best Practices Guide Version 3.0.  NVIDIA Corporation. NVIDIA CUDA Best Practices Guide Version 3.0."},{"key":"e_1_3_2_1_39_1","volume-title":"NVIDIA CUDA Architecture Introduction and Overview","author":"NVIDIA Corporation","year":"2009","unstructured":"NVIDIA Corporation . NVIDIA CUDA Architecture Introduction and Overview , 2009 . NVIDIA Corporation. NVIDIA CUDA Architecture Introduction and Overview, 2009."},{"key":"e_1_3_2_1_40_1","volume-title":"Version 3.0","author":"NVIDIA Corporation","year":"2009","unstructured":"NVIDIA Corporation . NVIDIA CUDA Programming Guide , Version 3.0 , 2009 . NVIDIA Corporation. NVIDIA CUDA Programming Guide, Version 3.0, 2009."},{"key":"e_1_3_2_1_41_1","first-page":"21","volume-title":"State of the Art Reports","author":"Owens J. D.","year":"2005","unstructured":"J. D. Owens , D. Luebke , N. Govindaraju , M. Harris , J. Kruger , A. E. Lefohn , and T. J. Purcell . A Survey of General-Purpose Computation on Graphics Hardware. In Eurographics 2005 , State of the Art Reports , pages 21 -- 51 , Aug. 2005 . J. D. Owens, D. Luebke, N. Govindaraju, M. Harris, J. Kruger, A. E. Lefohn, and T. J. Purcell. A Survey of General-Purpose Computation on Graphics Hardware. In Eurographics 2005, State of the Art Reports, pages 21--51, Aug. 2005."},{"key":"e_1_3_2_1_42_1","doi-asserted-by":"publisher","DOI":"10.1111\/j.1467-8659.2007.01012.x"},{"key":"e_1_3_2_1_43_1","doi-asserted-by":"publisher","DOI":"10.1145\/1345206.1345220"},{"key":"e_1_3_2_1_44_1","volume-title":"Annual Linux Showcase & Conference","author":"Salim J. H.","year":"2001","unstructured":"J. H. Salim , R. Olsson , and A. Kuznetsov . Beyond softnet . In Annual Linux Showcase & Conference , 2001 . J. H. Salim, R. Olsson, and A. Kuznetsov. Beyond softnet. In Annual Linux Showcase & Conference, 2001."},{"key":"e_1_3_2_1_45_1","doi-asserted-by":"publisher","DOI":"10.1145\/1399504.1360617"},{"key":"e_1_3_2_1_46_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2004.53"},{"key":"e_1_3_2_1_47_1","doi-asserted-by":"publisher","DOI":"10.1109\/INFCOM.2009.5061951"},{"key":"e_1_3_2_1_48_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2009.4919649"},{"key":"e_1_3_2_1_49_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-85053-3_6"},{"key":"e_1_3_2_1_50_1","doi-asserted-by":"publisher","DOI":"10.1109\/12.286299"},{"key":"e_1_3_2_1_51_1","doi-asserted-by":"publisher","DOI":"10.1145\/1282427.1282391"},{"key":"e_1_3_2_1_52_1","doi-asserted-by":"publisher","DOI":"10.1145\/800076.802479"},{"key":"e_1_3_2_1_53_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-87403-4_7"},{"key":"e_1_3_2_1_54_1","doi-asserted-by":"publisher","DOI":"10.1145\/1323548.1323562"},{"key":"e_1_3_2_1_55_1","doi-asserted-by":"publisher","DOI":"10.1145\/263105.263136"}],"event":{"name":"SIGCOMM '10: ACM SIGCOMM 2010 Conference","location":"New Delhi India","acronym":"SIGCOMM '10","sponsor":["SIGCOMM ACM Special Interest Group on Data Communication"]},"container-title":["Proceedings of the ACM SIGCOMM 2010 conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1851182.1851207","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1851182.1851207","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T08:08:50Z","timestamp":1750234130000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1851182.1851207"}},"subtitle":["a GPU-accelerated software router"],"short-title":[],"issued":{"date-parts":[[2010,8,30]]},"references-count":55,"alternative-id":["10.1145\/1851182.1851207","10.1145\/1851182"],"URL":"https:\/\/doi.org\/10.1145\/1851182.1851207","relation":{"is-identical-to":[{"id-type":"doi","id":"10.1145\/1851275.1851207","asserted-by":"object"}]},"subject":[],"published":{"date-parts":[[2010,8,30]]},"assertion":[{"value":"2010-08-30","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}