{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:30:33Z","timestamp":1750307433909,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":4,"publisher":"ACM","license":[{"start":{"date-parts":[[2010,9,11]],"date-time":"2010-09-11T00:00:00Z","timestamp":1284163200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2010,9,11]]},"DOI":"10.1145\/1854273.1854356","type":"proceedings-article","created":{"date-parts":[[2010,9,14]],"date-time":"2010-09-14T14:53:20Z","timestamp":1284476000000},"page":"569-570","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["NUcache"],"prefix":"10.1145","author":[{"given":"R.","family":"Manikantan","sequence":"first","affiliation":[{"name":"Indian Institute of Science, Bangalore, India"}]},{"given":"Kaushik","family":"Rajan","sequence":"additional","affiliation":[{"name":"Microsoft Research India, Bangalore, India"}]},{"given":"R.","family":"Govindarajan","sequence":"additional","affiliation":[{"name":"Indian Institute of Science, Bangalore, India"}]}],"member":"320","published-online":{"date-parts":[[2010,9,11]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1147\/sj.52.0078"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"crossref","first-page":"164","DOI":"10.1109\/ISPASS.2001.990695","volume-title":"Performance Analysis of Systems and Software, 2001. ISPASS. 2001 IEEE International Symposium on","author":"Luo K.","year":"2001","unstructured":"}} Luo , K. , Gummaraju , J. , and Franklin , M . Balancing thoughput and fairness in smt processors . In Performance Analysis of Systems and Software, 2001. ISPASS. 2001 IEEE International Symposium on ( 2001 ), pp. 164 -- 171 . }}Luo, K., Gummaraju, J., and Franklin, M. Balancing thoughput and fairness in smt processors. In Performance Analysis of Systems and Software, 2001. ISPASS. 2001 IEEE International Symposium on (2001), pp. 164--171."},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.49"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555778"}],"event":{"name":"PACT '10: International Conference on Parallel Architectures and Compilation Techniques","sponsor":["IFIP WG 10.3 IFIP working group 10.3 on concurrent systems","IEEE CS TCPP IEEE-CS technical committee on parallel processing","SIGARCH ACM Special Interest Group on Computer Architecture","IEEE CS TCAA IEEE CS technical committee on architectural acoustics"],"location":"Vienna Austria","acronym":"PACT '10"},"container-title":["Proceedings of the 19th international conference on Parallel architectures and compilation techniques"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1854273.1854356","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1854273.1854356","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T11:39:56Z","timestamp":1750246796000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1854273.1854356"}},"subtitle":["a multicore cache organization based on next-use distance"],"short-title":[],"issued":{"date-parts":[[2010,9,11]]},"references-count":4,"alternative-id":["10.1145\/1854273.1854356","10.1145\/1854273"],"URL":"https:\/\/doi.org\/10.1145\/1854273.1854356","relation":{},"subject":[],"published":{"date-parts":[[2010,9,11]]},"assertion":[{"value":"2010-09-11","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}