{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,11]],"date-time":"2026-06-11T22:25:34Z","timestamp":1781216734579,"version":"3.54.1"},"publisher-location":"New York, NY, USA","reference-count":19,"publisher":"ACM","license":[{"start":{"date-parts":[[2010,10,25]],"date-time":"2010-10-25T00:00:00Z","timestamp":1287964800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2010,10,25]]},"DOI":"10.1145\/1872007.1872028","type":"proceedings-article","created":{"date-parts":[[2010,10,28]],"date-time":"2010-10-28T14:43:19Z","timestamp":1288276999000},"page":"1-10","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":4,"title":["Efficient lookahead routing and header compression for multicasting in networks-on-chip"],"prefix":"10.1145","author":[{"given":"Lei","family":"Wang","sequence":"first","affiliation":[{"name":"Texas A&amp;M University, College Station, TX"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Poornachandran","family":"Kumar","sequence":"additional","affiliation":[{"name":"Texas A&amp;M University, College Station, TX"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Rahul","family":"Boyapati","sequence":"additional","affiliation":[{"name":"Texas A&amp;M University, College Station, TX"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ki Hwan","family":"Yum","sequence":"additional","affiliation":[{"name":"Texas A&amp;M University, College Station, TX"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Eun Jung","family":"Kim","sequence":"additional","affiliation":[{"name":"Texas A&amp;M University, College Station, TX"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2010,10,25]]},"reference":[{"key":"e_1_3_2_1_1_1","first-page":"212","article-title":"Adaptive Cache Compression for High-Performance Processors","author":"Alameldeen A. R.","year":"2004","unstructured":"A. R. Alameldeen and D. A. Wood , \" Adaptive Cache Compression for High-Performance Processors ,\" in ISCA , 2004 , pp. 212 -- 223 . A. R. Alameldeen and D. A. Wood, \"Adaptive Cache Compression for High-Performance Processors,\" in ISCA, 2004, pp. 212--223.","journal-title":"ISCA"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/2.976921"},{"key":"e_1_3_2_1_3_1","first-page":"90","article-title":"Creating a Wider Bus Using Caching Techniques","author":"Citron D.","year":"1995","unstructured":"D. Citron and L. Rudolph , \" Creating a Wider Bus Using Caching Techniques ,\" in HPCA , 1995 , pp. 90 -- 99 . D. Citron and L. Rudolph, \"Creating a Wider Bus Using Caching Techniques,\" in HPCA, 1995, pp. 90--99.","journal-title":"HPCA"},{"key":"e_1_3_2_1_4_1","volume-title":"Morgan Kaufmann","author":"Dally W. J.","year":"2003","unstructured":"W. J. Dally and B. Towles , Principles and Practices of Interconnection Networks . Morgan Kaufmann , 2003 . W. J. Dally and B. Towles, Principles and Practices of Interconnection Networks. Morgan Kaufmann, 2003."},{"key":"e_1_3_2_1_5_1","first-page":"141","article-title":"Scalable pipelined interconnect for distributed endpoint routing: The SGI SPIDER chip","volume":"4","author":"Galles M.","year":"2009","unstructured":"M. Galles , \" Scalable pipelined interconnect for distributed endpoint routing: The SGI SPIDER chip ,\" in Proceedings of Hot Interconnect 4 , 2009 , pp. 141 -- 146 . M. Galles, \"Scalable pipelined interconnect for distributed endpoint routing: The SGI SPIDER chip,\" in Proceedings of Hot Interconnect 4, 2009, pp. 141--146.","journal-title":"Proceedings of Hot Interconnect"},{"key":"e_1_3_2_1_6_1","volume-title":"Implementation and Evaluation of On-Chip Network Architectures,\" in ICCD","author":"Gratz P.","year":"2006","unstructured":"P. Gratz , C. Kim , R. G. McDonald , S. W. Keckler , and D. Burger , \" Implementation and Evaluation of On-Chip Network Architectures,\" in ICCD , 2006 . P. Gratz, C. Kim, R. G. McDonald, S. W. Keckler, and D. Burger, \"Implementation and Evaluation of On-Chip Network Architectures,\" in ICCD, 2006."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2007.23"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.77"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.12"},{"key":"e_1_3_2_1_10_1","first-page":"423","article-title":"ORION 2.0: A Fast and Accurate NoC Power and Area Model for Early-Stage Design Space Exploration","author":"Kahng A. B.","year":"2009","unstructured":"A. B. Kahng , B. Li , L.-S. Peh , and K. Samadi , \" ORION 2.0: A Fast and Accurate NoC Power and Area Model for Early-Stage Design Space Exploration ,\" in DATE , 2009 , pp. 423 -- 428 . A. B. Kahng, B. Li, L.-S. Peh, and K. Samadi, \"ORION 2.0: A Fast and Accurate NoC Power and Area Model for Early-Stage Design Space Exploration,\" in DATE, 2009, pp. 423--428.","journal-title":"DATE"},{"key":"e_1_3_2_1_11_1","first-page":"63","article-title":"A 4.6Tbits\/s 3.6GHz Single-Cycle NoC Router with a Novel Switch Allocator in 65nm CMOS","author":"Kumar A.","year":"2007","unstructured":"A. Kumar , P. Kundu , A. P. Singh , L.-S. Peh , and N. K. Jha , \" A 4.6Tbits\/s 3.6GHz Single-Cycle NoC Router with a Novel Switch Allocator in 65nm CMOS ,\" in ICCD , 2007 , pp. 63 -- 70 . A. Kumar, P. Kundu, A. P. Singh, L.-S. Peh, and N. K. Jha, \"A 4.6Tbits\/s 3.6GHz Single-Cycle NoC Router with a Novel Switch Allocator in 65nm CMOS,\" in ICCD, 2007, pp. 63--70.","journal-title":"ICCD"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.2010691"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/859618.859640"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2008.4771805"},{"key":"e_1_3_2_1_15_1","first-page":"341","article-title":"Scalar Operand Networks: On-Chip Interconnect for ILP in Partitioned Architecture","author":"Taylor M. B.","year":"2003","unstructured":"M. B. Taylor , W. Lee , S. P. Amarasinghe , and A. Agarwal , \" Scalar Operand Networks: On-Chip Interconnect for ILP in Partitioned Architecture .\" in Proceedings of HPCA , 2003 , pp. 341 -- 353 . M. B. Taylor, W. Lee, S. P. Amarasinghe, and A. Agarwal, \"Scalar Operand Networks: On-Chip Interconnect for ILP in Partitioned Architecture.\" in Proceedings of HPCA, 2003, pp. 341--353.","journal-title":"Proceedings of HPCA"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2009.5071446"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.89"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/360128.360154"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996626"}],"event":{"name":"ANCS '10: Symposium on Architecture for Networking and Communications Systems","location":"La Jolla California","acronym":"ANCS '10","sponsor":["SIGCOMM ACM Special Interest Group on Data Communication","SIGARCH ACM Special Interest Group on Computer Architecture","IEEE-CS\\TCCA TC on Computer Arhitecture"]},"container-title":["Proceedings of the 6th ACM\/IEEE Symposium on Architectures for Networking and Communications Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1872007.1872028","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1872007.1872028","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T12:17:33Z","timestamp":1750249053000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1872007.1872028"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,10,25]]},"references-count":19,"alternative-id":["10.1145\/1872007.1872028","10.1145\/1872007"],"URL":"https:\/\/doi.org\/10.1145\/1872007.1872028","relation":{},"subject":[],"published":{"date-parts":[[2010,10,25]]},"assertion":[{"value":"2010-10-25","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}