{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:31:22Z","timestamp":1750307482009,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":24,"publisher":"ACM","license":[{"start":{"date-parts":[[2010,10,24]],"date-time":"2010-10-24T00:00:00Z","timestamp":1287878400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2010,10,24]]},"DOI":"10.1145\/1878961.1878983","type":"proceedings-article","created":{"date-parts":[[2010,11,9]],"date-time":"2010-11-09T15:01:31Z","timestamp":1289314891000},"page":"115-124","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["Statistical approach in a system level methodology to deal with process variation"],"prefix":"10.1145","author":[{"given":"Concepci\u00f3n","family":"Sanz Pineda","sequence":"first","affiliation":[{"name":"Universidad Complutense de Madrid, Madrid, Spain"}]},{"given":"Manuel","family":"Prieto","sequence":"additional","affiliation":[{"name":"Universidad Complutense de Madrid, Madrid, Spain"}]},{"given":"Jose Ignacio","family":"G\u00f3mez","sequence":"additional","affiliation":[{"name":"Universidad Complutense de Madrid, Madrid, Spain"}]},{"given":"Christian","family":"Tenllado","sequence":"additional","affiliation":[{"name":"Universidad Complutense de Madrid, Madrid, Spain"}]},{"given":"Francky","family":"Catthoor","sequence":"additional","affiliation":[{"name":"Inter-University Microelectronics Center - IMEC, Leuven, Belgium"}]}],"member":"320","published-online":{"date-parts":[[2010,10,24]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2009.239"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.5555\/996070.1009993"},{"key":"e_1_3_2_1_3_1","unstructured":"ATOMIUM. http:\/\/www.imec.be\/design\/atomium\/.  ATOMIUM. http:\/\/www.imec.be\/design\/atomium\/."},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2004.1274005"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996588"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.19"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"crossref","DOI":"10.1007\/978-1-4757-4903-8","volume-title":"Danckaert et al. Data access and storage management for embedded programmable processors","author":"Catthoor F.","year":"2002","unstructured":"F. Catthoor , K. Danckaert et al. Data access and storage management for embedded programmable processors . Springer , Boston MA , 2002 . F. Catthoor, K. Danckaert et al. Data access and storage management for embedded programmable processors. Springer, Boston MA, 2002."},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2008.10.002"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSOC.2006.321995"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.5555\/1874620.1874914"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2009.4798265"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.291"},{"key":"e_1_3_2_1_13_1","first-page":"1297","volume-title":"Adaptive SRAM design for dynamic voltage scaling VLSI systems","author":"Kirolos S.","year":"2007","unstructured":"S. Kirolos and Y. Massoud . Adaptive SRAM design for dynamic voltage scaling VLSI systems . pages 1297 -- 1300 , Aug. 2007 . S. Kirolos and Y. Massoud. Adaptive SRAM design for dynamic voltage scaling VLSI systems. pages 1297--1300, Aug. 2007."},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/REAL.2004.18"},{"key":"e_1_3_2_1_15_1","first-page":"176","volume-title":"Adaptive SRAM memory for low power and high yield","author":"Mohammad B.","year":"2008","unstructured":"B. Mohammad , S. Bijansky , A. Aziz , and J. Abraham . Adaptive SRAM memory for low power and high yield . pages 176 -- 181 , Oct. 2008 . B. Mohammad, S. Bijansky, A. Aziz, and J. Abraham. Adaptive SRAM memory for low power and high yield. pages 176--181, Oct. 2008."},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2005.1584080"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2004.1346504"},{"key":"e_1_3_2_1_18_1","first-page":"1433","volume-title":"Matching properties of mos transistors","author":"Pelgrom M. J. M.","year":"1989","unstructured":"M. J. M. Pelgrom , A. C. J. Duinmaijer , and A. P. G. Welbers . Matching properties of mos transistors . volume 24 , pages 1433 -- 1440 , 1989 . M. J. M. Pelgrom, A. C. J. Duinmaijer, and A. P. G. Welbers. Matching properties of mos transistors. volume 24, pages 1433--1440, 1989."},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIR.2006.307546"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/1367045.1367058"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.5555\/1509633.1509703"},{"key":"e_1_3_2_1_23_1","volume-title":"Compaq Western Research Laboratory","author":"Viredaz M. A.","year":"2001","unstructured":"M. A. Viredaz , M. A. Viredaz , D. A. Wallach , and D. A. Wallach . Power evaluation of a handheld computer: A case study. Technical report , Compaq Western Research Laboratory , 2001 . M. A. Viredaz, M. A. Viredaz, D. A. Wallach, and D. A. Wallach. Power evaluation of a handheld computer: A case study. Technical report, Compaq Western Research Laboratory, 2001."},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2005.859480"},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669116"}],"event":{"name":"ESWeek '10: Sixth Embedded Systems Week","sponsor":["SIGBED ACM Special Interest Group on Embedded Systems","SIGDA ACM Special Interest Group on Design Automation","SIGMICRO ACM Special Interest Group on Microarchitectural Research and Processing","CEDA","IEEE CAS","IEEE CS"],"location":"Scottsdale Arizona USA","acronym":"ESWeek '10"},"container-title":["Proceedings of the eighth IEEE\/ACM\/IFIP international conference on Hardware\/software codesign and system synthesis"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1878961.1878983","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1878961.1878983","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T12:09:04Z","timestamp":1750248544000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1878961.1878983"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,10,24]]},"references-count":24,"alternative-id":["10.1145\/1878961.1878983","10.1145\/1878961"],"URL":"https:\/\/doi.org\/10.1145\/1878961.1878983","relation":{},"subject":[],"published":{"date-parts":[[2010,10,24]]},"assertion":[{"value":"2010-10-24","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}