{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:28:04Z","timestamp":1750307284663,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":9,"publisher":"ACM","license":[{"start":{"date-parts":[[2010,6,19]],"date-time":"2010-06-19T00:00:00Z","timestamp":1276905600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"name":"FPI research grant","award":["BES-2008-004599"],"award-info":[{"award-number":["BES-2008-004599"]}]},{"DOI":"10.13039\/501100004963","name":"Seventh Framework Programme","doi-asserted-by":"publisher","award":["ICT-FP7-248647","ICT-FP7-217068"],"award-info":[{"award-number":["ICT-FP7-248647","ICT-FP7-217068"]}],"id":[{"id":"10.13039\/501100004963","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Program AlBan, European Union Program of High Level Scholarships for Latin America","award":["E05D058240CO"],"award-info":[{"award-number":["E05D058240CO"]}]},{"name":"Consolider contract from the Ministry of Science and Innovation of Spain","award":["TIN2007-60625"],"award-info":[{"award-number":["TIN2007-60625"]}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2010,6,19]]},"DOI":"10.1145\/1882453.1882456","type":"proceedings-article","created":{"date-parts":[[2010,11,12]],"date-time":"2010-11-12T14:38:38Z","timestamp":1289572718000},"page":"1-11","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["Comparing last-level cache designs for CMP architectures"],"prefix":"10.1145","author":[{"given":"Augusto","family":"Vega","sequence":"first","affiliation":[{"name":"Barcelona Supercomputing Center and Universitat Polit\u00e8cnica de Catalunya, Medell\u00edn, Colombia"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alejandro","family":"Rico","sequence":"additional","affiliation":[{"name":"Barcelona Supercomputing Center and Universitat Polit\u00e8cnica de Catalunya, Medell\u00edn, Colombia"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Felipe","family":"Cabarcas","sequence":"additional","affiliation":[{"name":"Barcelona Supercomputing Center and Universitat Polit\u00e8cnica de Catalunya, Medell\u00edn, Colombia and Universidad de Antioquia, Medell\u00edn, Colombia"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alex","family":"Ram\u00edrez","sequence":"additional","affiliation":[{"name":"Barcelona Supercomputing Center and Universitat Polit\u00e8cnica de Catalunya, Medell\u00edn, Colombia"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mateo","family":"Valero","sequence":"additional","affiliation":[{"name":"Barcelona Supercomputing Center and Universitat Polit\u00e8cnica de Catalunya, Medell\u00edn, Colombia"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2010,6,19]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/1327171.1327184"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2004.21"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/1188455.1188546"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.5555\/956417.956577"},{"key":"e_1_3_2_1_5_1","unstructured":"N. Corp. Nvidia's next generation cuda compute architecture: Fermi. http:\/\/www.nvidia.com\/object\/fermi_architecture.html.  N. Corp. Nvidia's next generation cuda compute architecture: Fermi. http:\/\/www.nvidia.com\/object\/fermi_architecture.html."},{"key":"e_1_3_2_1_6_1","unstructured":"T. Corp. Tilera tile multicore processors. http:\/\/www.tilera.com\/products\/processors.php.  T. Corp. Tilera tile multicore processors. http:\/\/www.tilera.com\/products\/processors.php."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/1088149.1088154"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.5555\/1148882.1148891"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/1360612.1360617"}],"event":{"name":"IFMT '10: Second International Forum on Next-Generation Multicore\/Manycore Technologies","sponsor":["E-JUST Egypt-Japan University of Science and Technology","CAS IBM Centers for Advanced Studies","INRIA Institut Natl de Recherche en Info et en Automatique","ACM Association for Computing Machinery"],"location":"Saint-Malo France","acronym":"IFMT '10"},"container-title":["Proceedings of the Second International Forum on Next-Generation Multicore\/Manycore Technologies"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1882453.1882456","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1882453.1882456","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T10:59:34Z","timestamp":1750244374000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1882453.1882456"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,6,19]]},"references-count":9,"alternative-id":["10.1145\/1882453.1882456","10.1145\/1882453"],"URL":"https:\/\/doi.org\/10.1145\/1882453.1882456","relation":{},"subject":[],"published":{"date-parts":[[2010,6,19]]},"assertion":[{"value":"2010-06-19","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}