{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:31:10Z","timestamp":1750307470003,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":19,"publisher":"ACM","license":[{"start":{"date-parts":[[2010,12,4]],"date-time":"2010-12-04T00:00:00Z","timestamp":1291420800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2010,12,4]]},"DOI":"10.1145\/1921249.1921261","type":"proceedings-article","created":{"date-parts":[[2010,12,22]],"date-time":"2010-12-22T14:41:30Z","timestamp":1293028890000},"page":"45-50","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":8,"title":["A framework for designing congestion-aware deterministic routing"],"prefix":"10.1145","author":[{"given":"Abbas Eslami","family":"Kiasari","sequence":"first","affiliation":[{"name":"Royal Institute of Technology (KTH), Sweden"}]},{"given":"Axel","family":"Jantsch","sequence":"additional","affiliation":[{"name":"Royal Institute of Technology (KTH), Sweden"}]},{"given":"Zhonghai","family":"Lu","sequence":"additional","affiliation":[{"name":"Royal Institute of Technology (KTH), Sweden"}]}],"member":"320","published-online":{"date-parts":[[2010,12,4]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2002.801446"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1006\/jcom.1996.0035"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/71.877831"},{"key":"e_1_3_2_1_4_1","volume-title":"Principles and Practices of Interconnection Networks","author":"Dally W.","year":"2004","unstructured":"W. Dally and B. Towles , Principles and Practices of Interconnection Networks , Morgan Kaufmann Publishers Inc ., First edition, 2004 . W. Dally and B. Towles, Principles and Practices of Interconnection Networks, Morgan Kaufmann Publishers Inc., First edition, 2004."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1987.1676939"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/185675.185682"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/343647.343776"},{"key":"e_1_3_2_1_8_1","first-page":"166","article-title":"Network on a Chip: An Architecture for Billion Transistor Era","author":"Hemani A.","year":"2000","unstructured":"A. Hemani , et. al. , \" Network on a Chip: An Architecture for Billion Transistor Era ,\" Proceedings of the IEEE NorChip , pp. 166 -- 173 , 2000 . A. Hemani, et. al., \"Network on a Chip: An Architecture for Billion Transistor Era,\" Proceedings of the IEEE NorChip, pp. 166--173, 2000.","journal-title":"Proceedings of the IEEE NorChip"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996638"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.844106"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555782"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1126\/science.220.4598.671"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2005.104"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2008.106"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/78919.78921"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/MASCOTS.2006.9"},{"key":"e_1_3_2_1_17_1","first-page":"199","article-title":"Self-optimized Routing in a Network-on-a-Chip","author":"Trumler W.","year":"2008","unstructured":"W. Trumler , et. al. , \" Self-optimized Routing in a Network-on-a-Chip ,\" IFIP World Computer Congress , pp. 199 -- 212 , 2008 . W. Trumler, et. al., \"Self-optimized Routing in a Network-on-a-Chip,\" IFIP World Computer Congress, pp. 199--212, 2008.","journal-title":"IFIP World Computer Congress"},{"key":"e_1_3_2_1_18_1","first-page":"1","article-title":"Mapping of MPEG-4 Decoding on a Flexible Architecture Platform","volume":"4674","author":"van der Tol E. B.","year":"2002","unstructured":"E. B. van der Tol and E. G. Jaspers , \" Mapping of MPEG-4 Decoding on a Flexible Architecture Platform ,\" SPIE , vol. 4674 , pp. 1 -- 13 , 2002 . E. B. van der Tol and E. G. Jaspers, \"Mapping of MPEG-4 Decoding on a Flexible Architecture Platform,\" SPIE, vol. 4674, pp. 1--13, 2002.","journal-title":"SPIE"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/513918.514116"}],"event":{"name":"NoCArc'10: Third International Workshop on Network on Chip Architectures","acronym":"NoCArc'10","location":"Atlanta Georgia USA"},"container-title":["Proceedings of the Third International Workshop on Network on Chip Architectures"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1921249.1921261","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1921249.1921261","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T12:08:41Z","timestamp":1750248521000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1921249.1921261"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,12,4]]},"references-count":19,"alternative-id":["10.1145\/1921249.1921261","10.1145\/1921249"],"URL":"https:\/\/doi.org\/10.1145\/1921249.1921261","relation":{},"subject":[],"published":{"date-parts":[[2010,12,4]]},"assertion":[{"value":"2010-12-04","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}