{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,6]],"date-time":"2026-06-06T01:12:10Z","timestamp":1780708330033,"version":"3.54.1"},"publisher-location":"New York, NY, USA","reference-count":13,"publisher":"ACM","license":[{"start":{"date-parts":[[2011,2,27]],"date-time":"2011-02-27T00:00:00Z","timestamp":1298764800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2011,2,27]]},"DOI":"10.1145\/1950413.1950421","type":"proceedings-article","created":{"date-parts":[[2011,3,3]],"date-time":"2011-03-03T08:48:05Z","timestamp":1299142085000},"page":"25-28","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":78,"title":["Leap scratchpads"],"prefix":"10.1145","author":[{"given":"Michael","family":"Adler","sequence":"first","affiliation":[{"name":"Intel Corporation, Hudson, MA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Kermin E.","family":"Fleming","sequence":"additional","affiliation":[{"name":"Massachusetts Institute of Technology, Cambridge, MA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Angshuman","family":"Parashar","sequence":"additional","affiliation":[{"name":"Intel Corporation, Hudson, MA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Michael","family":"Pellauer","sequence":"additional","affiliation":[{"name":"Massachusetts Institute of Technology, Cambridge, MA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Joel","family":"Emer","sequence":"additional","affiliation":[{"name":"Intel Corporation, Hudson, MA, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2011,2,27]]},"reference":[{"key":"e_1_3_2_1_1_1","first-page":"249","volume-title":"Synthesis and Verification. In MEMOCODE '03: Proceedings of the First ACM and IEEE International Conference on Formal Methods and Models for Co-Design","unstructured":"Arvind. Bluespec : A Language for Hardware Design, Simulation , Synthesis and Verification. In MEMOCODE '03: Proceedings of the First ACM and IEEE International Conference on Formal Methods and Models for Co-Design , page 249 . IEEE Computer Society, 2003. Arvind. Bluespec: A Language for Hardware Design, Simulation, Synthesis and Verification. In MEMOCODE '03: Proceedings of the First ACM and IEEE International Conference on Formal Methods and Models for Co-Design, page 249. IEEE Computer Society, 2003."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/1481839.1481846"},{"key":"e_1_3_2_1_3_1","first-page":"11","volume-title":"Formal Methods and Models for Codesign (MEMOCODE), 2010 8th IEEE\/ACM International Conference on","author":"Dave N.","year":"2010","unstructured":"N. Dave , M. C. Ng , M. Pellauer , and Arvind. A design ow based on modular refinement . In Formal Methods and Models for Codesign (MEMOCODE), 2010 8th IEEE\/ACM International Conference on , pages 11 -- 20 , Jul. 2010 . N. Dave, M. C. Ng, M. Pellauer, and Arvind. A design ow based on modular refinement. In Formal Methods and Models for Codesign (MEMOCODE), 2010 8th IEEE\/ACM International Conference on, pages 11--20, Jul. 2010."},{"key":"e_1_3_2_1_4_1","first-page":"49","volume-title":"Stream-Oriented FPGA Computing in the Streams-C High Level Language. In FCCM '00: Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines","author":"Gokhale M. B.","unstructured":"M. B. Gokhale , J. M. Stone , J. Arnold , and M. Kalinowski . Stream-Oriented FPGA Computing in the Streams-C High Level Language. In FCCM '00: Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines , page 49 . IEEE Computer Society, 2000. M. B. Gokhale, J. M. Stone, J. Arnold, and M. Kalinowski. Stream-Oriented FPGA Computing in the Streams-C High Level Language. In FCCM '00: Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines, page 49. IEEE Computer Society, 2000."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-70592-5_5"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/74926.74953"},{"key":"e_1_3_2_1_7_1","first-page":"182","volume-title":"MICRO 31: Proceedings of the 31st Annual ACM\/IEEE International Symposium on Microarchitecture","author":"Luk C.-K.","year":"1998","unstructured":"C.-K. Luk and T. C. Mowry . Cooperative Prefetching: Compiler and Hardware Support for Effective Instruction Prefetching in Modern Processors . In MICRO 31: Proceedings of the 31st Annual ACM\/IEEE International Symposium on Microarchitecture , pages 182 -- 194 . IEEE Computer Society Press , 1998 . C.-K. Luk and T. C. Mowry. Cooperative Prefetching: Compiler and Hardware Support for Effective Instruction Prefetching in Modern Processors. In MICRO 31: Proceedings of the 31st Annual ACM\/IEEE International Symposium on Microarchitecture, pages 182--194. IEEE Computer Society Press, 1998."},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2003.1220583"},{"key":"e_1_3_2_1_9_1","volume-title":"LEAP: A Virtual Platform Architecture for FPGAs. In CARL '10: The 1st Workshop on the Intersections of Computer Architecture and Reconfigurable Logic","author":"Parashar A.","year":"2010","unstructured":"A. Parashar , M. Adler , K. Fleming , M. Pellauer , and J. Emer . LEAP: A Virtual Platform Architecture for FPGAs. In CARL '10: The 1st Workshop on the Intersections of Computer Architecture and Reconfigurable Logic , 2010 . A. Parashar, M. Adler, K. Fleming, M. Pellauer, and J. Emer. LEAP: A Virtual Platform Architecture for FPGAs. In CARL '10: The 1st Workshop on the Intersections of Computer Architecture and Reconfigurable Logic, 2010."},{"key":"e_1_3_2_1_10_1","volume-title":"Hybrid CPU\/FPGA Performance Models. In WARP '08: The 3rd Workshop on Architectural Research Prototyping","author":"Parashar A.","year":"2008","unstructured":"A. Parashar , M. Adler , M. Pellauer , and J. Emer . Hybrid CPU\/FPGA Performance Models. In WARP '08: The 3rd Workshop on Architectural Research Prototyping , 2008 . A. Parashar, M. Adler, M. Pellauer, and J. Emer. Hybrid CPU\/FPGA Performance Models. In WARP '08: The 3rd Workshop on Architectural Research Prototyping, 2008."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1629986"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/1723112.1723125"},{"key":"e_1_3_2_1_13_1","unstructured":"Xilinx Inc. UG363: Virtex-6 FPGA Memory Resources User Guide. 2010.  Xilinx Inc. UG363: Virtex-6 FPGA Memory Resources User Guide. 2010."}],"event":{"name":"FPGA '11: ACM\/SIGDA International Symposium on Field Programmable Gate Arrays","location":"Monterey CA USA","acronym":"FPGA '11","sponsor":["SIGDA ACM Special Interest Group on Design Automation"]},"container-title":["Proceedings of the 19th ACM\/SIGDA international symposium on Field programmable gate arrays"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1950413.1950421","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1950413.1950421","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T10:52:57Z","timestamp":1750243977000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1950413.1950421"}},"subtitle":["automatic memory and cache management for reconfigurable logic"],"short-title":[],"issued":{"date-parts":[[2011,2,27]]},"references-count":13,"alternative-id":["10.1145\/1950413.1950421","10.1145\/1950413"],"URL":"https:\/\/doi.org\/10.1145\/1950413.1950421","relation":{},"subject":[],"published":{"date-parts":[[2011,2,27]]},"assertion":[{"value":"2011-02-27","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}