{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,4]],"date-time":"2025-12-04T09:47:35Z","timestamp":1764841655200,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":23,"publisher":"ACM","license":[{"start":{"date-parts":[[2011,3,27]],"date-time":"2011-03-27T00:00:00Z","timestamp":1301184000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2011,3,27]]},"DOI":"10.1145\/1960397.1960423","type":"proceedings-article","created":{"date-parts":[[2011,3,22]],"date-time":"2011-03-22T12:25:29Z","timestamp":1300796729000},"page":"107-114","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":16,"title":["Power-driven flip-flop merging and relocation"],"prefix":"10.1145","author":[{"given":"Shao-Huan","family":"Wang","sequence":"first","affiliation":[{"name":"National Tsing Hua University, Hsinchu, Taiwan Roc"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yu-Yi","family":"Liang","sequence":"additional","affiliation":[{"name":"National Tsing Hua University, Hsinchu, Taiwan Roc"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tien-Yu","family":"Kuo","sequence":"additional","affiliation":[{"name":"National Tsing Hua University, Hsinchu, Taiwan Roc"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wai-Kei","family":"Mak","sequence":"additional","affiliation":[{"name":"National Tsing Hua University, Hsinchu, Taiwan Roc"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2011,3,27]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/4.293111"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996614"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2008.91"},{"key":"e_1_3_2_1_4_1","first-page":"3658","volume-title":"IEEE International Symposium on Circuits and Systems","author":"Seyedi A.S.","year":"2006","unstructured":"A.S. Seyedi , S.H. Rasouli , A. Amirabadi , and A. Afzali-Kusha . Low power low leakage clock gated static pulsed flip-flop . In IEEE International Symposium on Circuits and Systems , pages 3658 -- 3611 , 2006 . A.S. Seyedi, S.H. Rasouli, A. Amirabadi, and A. Afzali-Kusha. Low power low leakage clock gated static pulsed flip-flop. In IEEE International Symposium on Circuits and Systems, pages 3658--3611, 2006."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/ITC.2010.100"},{"key":"e_1_3_2_1_6_1","first-page":"2054","volume-title":"IEEE Conference on Industrial Electronics and Applications","author":"Yu C.C.","year":"2007","unstructured":"C.C. Yu . Design of low-power double edge-triggered flip-flop circuit . In IEEE Conference on Industrial Electronics and Applications , pages 2054 -- 2057 , 2007 . C.C. Yu. Design of low-power double edge-triggered flip-flop circuit. In IEEE Conference on Industrial Electronics and Applications, pages 2054--2057, 2007."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2010.5450528"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/775832.775989"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/81.841927"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/1065579.1065791"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/1065579.1065628"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2009.4810370"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/ASIC.1992.270312"},{"key":"e_1_3_2_1_14_1","volume-title":"EE Times Asia","author":"Kretchmer Y.","year":"2001","unstructured":"Y. Kretchmer . Using multi-bit register inference to save area and power: the good, the bad, and the ugly . In EE Times Asia , 2001 . Y. Kretchmer. Using multi-bit register inference to save area and power: the good, the bad, and the ugly. In EE Times Asia, 2001."},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.5555\/2133429.2133474"},{"key":"e_1_3_2_1_16_1","volume-title":"Small workshop on Interval Methods","author":"Chabert G.","year":"2009","unstructured":"G. Chabert , L. Jaulin , and X. Lorca . A constraint on the number of distinct vectors with application to localization. Technical report , Small workshop on Interval Methods , 2009 . G. Chabert, L. Jaulin, and X. Lorca. A constraint on the number of distinct vectors with application to localization. Technical report, Small workshop on Interval Methods, 2009."},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2004.836733"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/SOCCON.2009.5398030"},{"key":"e_1_3_2_1_19_1","volume-title":"IEEE Symposium on Foundations of Computer Science","author":"Shamos M.I.","year":"1991","unstructured":"M.I. Shamos and D. Hoey . Geometric intersection problems . In IEEE Symposium on Foundations of Computer Science , 1991 . M.I. Shamos and D. Hoey. Geometric intersection problems. In IEEE Symposium on Foundations of Computer Science, 1991."},{"key":"e_1_3_2_1_20_1","volume-title":"MIT","author":"Abelson H.","year":"1984","unstructured":"H. Abelson , J. Sussman , and J. Sussman . Structure and Interpretation of Computer Programs . MIT , 1984 . H. Abelson, J. Sussman, and J. Sussman. Structure and Interpretation of Computer Programs. MIT, 1984."},{"key":"e_1_3_2_1_21_1","unstructured":"CAD contest of taiwan. http:\/\/cad\\_contest.ee.ntu.edu.tw\/cad10\/Problems\/B1\\_Faraday\\_091223\\_MultiBitFF.pdf.  CAD contest of taiwan. http:\/\/cad\\_contest.ee.ntu.edu.tw\/cad10\/Problems\/B1\\_Faraday\\_091223\\_MultiBitFF.pdf."},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1991.185269"},{"key":"e_1_3_2_1_23_1","unstructured":"A.B. Kahng and C.W. Tsao. Bounded-skew clock tree routing - version 1.0. http:\/\/vlsicad.ucsd.edu\/GSRC\/bookshelf\/Slots\/BST\/.  A.B. Kahng and C.W. Tsao. Bounded-skew clock tree routing - version 1.0. http:\/\/vlsicad.ucsd.edu\/GSRC\/bookshelf\/Slots\/BST\/."}],"event":{"name":"ISPD'11: International Symposium on Physical Design","sponsor":["SIGDA ACM Special Interest Group on Design Automation"],"location":"Santa Barbara CA USA","acronym":"ISPD'11"},"container-title":["Proceedings of the 2011 international symposium on Physical design"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1960397.1960423","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1960397.1960423","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T09:48:53Z","timestamp":1750240133000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1960397.1960423"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,3,27]]},"references-count":23,"alternative-id":["10.1145\/1960397.1960423","10.1145\/1960397"],"URL":"https:\/\/doi.org\/10.1145\/1960397.1960423","relation":{},"subject":[],"published":{"date-parts":[[2011,3,27]]},"assertion":[{"value":"2011-03-27","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}