{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:28:40Z","timestamp":1750307320047,"version":"3.41.0"},"reference-count":41,"publisher":"Association for Computing Machinery (ACM)","issue":"2","license":[{"start":{"date-parts":[[2011,6,1]],"date-time":"2011-06-01T00:00:00Z","timestamp":1306886400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["J. Emerg. Technol. Comput. Syst."],"published-print":{"date-parts":[[2011,6]]},"abstract":"<jats:p>Tens and eventually hundreds of processing cores are projected to be integrated onto future microprocessors, making the global interconnect a key component to achieving scalable chip performance within a given power envelope. While CMOS-compatible nanophotonics has emerged as a leading candidate for replacing global wires beyond the 16nm timeframe, on-chip optical interconnect architectures are typically limited in scalability or are dependent on comparatively slow electrical control networks.<\/jats:p>\n          <jats:p>In this article, we present a hybrid electrical\/optical router for future large scale, cache coherent multicore microprocessors. The heart of the router is a low-latency optical crossbar that uses predecoded source routing and switch state preconfiguration to transmit cache-line-sized packets several hops in a single clock cycle under contentionless conditions. Overall, our optical router achieves 2X better network performance than a state-of-the-art electrical baseline in a mesh topology while consuming 30% less network power.<\/jats:p>","DOI":"10.1145\/1970406.1970411","type":"journal-article","created":{"date-parts":[[2011,6,28]],"date-time":"2011-06-28T17:31:10Z","timestamp":1309282270000},"page":"1-20","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":4,"title":["A low-latency, high-throughput on-chip optical router architecture for future chip multiprocessors"],"prefix":"10.1145","volume":"7","author":[{"given":"Mark J.","family":"Cianchetti","sequence":"first","affiliation":[{"name":"Cornell University"}]},{"given":"David H.","family":"Albonesi","sequence":"additional","affiliation":[{"name":"Cornell University"}]}],"member":"320","published-online":{"date-parts":[[2011,7]]},"reference":[{"key":"e_1_2_1_1_1","first-page":"24","article-title":"All-optical switching on a silicon chip","volume":"29","author":"Almeida V. R.","year":"2004","unstructured":"Almeida , V. R. , Barrios , C. A. , Panepucci , R. R. , Lipson , M. , Foster , M. A. , Ouzounov , D. G. , and Gaeta , A. L. 2004 . All-optical switching on a silicon chip . Opt. Lett. 29 , 24 . Almeida, V. R., Barrios, C. A., Panepucci, R. R., Lipson, M., Foster, M. A., Ouzounov, D. G., and Gaeta, A. L. 2004. All-optical switching on a silicon chip. Opt. Lett. 29, 24.","journal-title":"Opt. Lett."},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/1183401.1183430"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1364\/OPEX.12.001437"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/MCOM.2003.1222715"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1364\/OL.32.002801"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/1053355.1053360"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/MNET.2004.1301018"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555809"},{"key":"e_1_2_1_9_1","unstructured":"Dally W. and Towles B. 2007. Principles and Practices of Interconnection Networks. Morgan Kaufmann.   Dally W. and Towles B. 2007. Principles and Practices of Interconnection Networks. Morgan Kaufmann."},{"key":"e_1_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/1531542.1531607"},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1364\/OE.17.011366"},{"key":"e_1_2_1_12_1","volume-title":"The ITRS Technology Workshop Groups, http:\/\/public.itrs.net.","author":"ITRS.","year":"2008","unstructured":"ITRS. 2008 . International Technology Roadmap for Semiconductors (ITRS) . The ITRS Technology Workshop Groups, http:\/\/public.itrs.net. ITRS. 2008. International Technology Roadmap for Semiconductors (ITRS). The ITRS Technology Workshop Groups, http:\/\/public.itrs.net."},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.12"},{"key":"e_1_2_1_14_1","first-page":"24","article-title":"Silicon-photonic clos networks for global on-chip communication","volume":"29","author":"Joshi A.","year":"2009","unstructured":"Joshi , A. , Batten , C. , Kwon , Y. , Beamer , S. , Shamim , I. , Asanovic , K. , and Stojanovic , V. 2009 . Silicon-photonic clos networks for global on-chip communication . Opt. Lett. 29 , 24 . Joshi, A., Batten, C., Kwon, Y., Beamer, S., Shamim, I., Asanovic, K., and Stojanovic, V. 2009. Silicon-photonic clos networks for global on-chip communication. Opt. Lett. 29, 24.","journal-title":"Opt. Lett."},{"key":"e_1_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.28"},{"key":"e_1_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/1736020.1736024"},{"key":"e_1_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/1250662.1250681"},{"key":"e_1_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/1152154.1152162"},{"key":"e_1_2_1_19_1","first-page":"7","article-title":"Novel optical single-mode asymmetric y-branches for variable power splitting","volume":"35","author":"Lin H.","year":"1999","unstructured":"Lin , H. , Su , J. , Cheng , R. , and Wang , W. 1999 . Novel optical single-mode asymmetric y-branches for variable power splitting . IEEE J. Quantum Electron. 35 , 7 . Lin, H., Su, J., Cheng, R., and Wang, W. 1999. Novel optical single-mode asymmetric y-branches for variable power splitting. IEEE J. Quantum Electron. 35, 7.","journal-title":"IEEE J. Quantum Electron."},{"key":"e_1_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.optcom.2004.07.008"},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/90.769767"},{"key":"e_1_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1063\/1.1889242"},{"key":"e_1_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/5.867687"},{"key":"e_1_2_1_24_1","unstructured":"Paniccia M. Krutul V. Jones R. Cohen O. Bowers J. Fang A. and Park H. 2006. A hybrid silicon laser. White Paper Intel Corporation.  Paniccia M. Krutul V. Jones R. Cohen O. Bowers J. Fang A. and Park H. 2006. A hybrid silicon laser. White Paper Intel Corporation."},{"key":"e_1_2_1_25_1","first-page":"21","article-title":"A hybrid algainas-silicon evanescent preamplifier and photodetector","volume":"15","author":"Park H.","year":"2007","unstructured":"Park , H. , hao Kuo , Y. , Fang , A. W. , Jones , R. , Cohen , O. , Paniccia , M. J. , and Bowers , J. E. 2007 . A hybrid algainas-silicon evanescent preamplifier and photodetector . Opt. Express 15 , 21 . Park, H., hao Kuo, Y., Fang, A. W., Jones, R., Cohen, O., Paniccia, M. J., and Bowers, J. E. 2007. A hybrid algainas-silicon evanescent preamplifier and photodetector. Opt. Express 15, 21.","journal-title":"Opt. Express"},{"volume-title":"Proceedings of the International Symposium on High-Performance Computer Architecture.","author":"Peh L.-S.","key":"e_1_2_1_26_1","unstructured":"Peh , L.-S. and Dally , W . 2001. A delay model and speculative architecture for pipelined routers . In Proceedings of the International Symposium on High-Performance Computer Architecture. Peh, L.-S. and Dally, W. 2001. A delay model and speculative architecture for pipelined routers. In Proceedings of the International Symposium on High-Performance Computer Architecture."},{"key":"e_1_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1063\/1.2908869"},{"key":"e_1_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1364\/OE.15.017283"},{"volume-title":"Proceedings of the Conference on Integrated Photonics Research, Silicon and Nanophotonics.","author":"Preston K.","key":"e_1_2_1_29_1","unstructured":"Preston , K. , Zhang , M. , and Lipson , M . 2010. Waveguide-integrated photodiode in deposited silicon . In Proceedings of the Conference on Integrated Photonics Research, Silicon and Nanophotonics. Preston, K., Zhang, M., and Lipson, M. 2010. Waveguide-integrated photodiode in deposited silicon. In Proceedings of the Conference on Integrated Photonics Research, Silicon and Nanophotonics."},{"key":"e_1_2_1_30_1","unstructured":"Renau J. Fraguela B. Tuck J. Liu W. Prvulovic M. Ceze L. Sarangi S. Sack P. Strauss K. and Montesinos P. 2005. Sesc simulator. http:\/\/sesc.sourceforge.net.  Renau J. Fraguela B. Tuck J. Liu W. Prvulovic M. Ceze L. Sarangi S. Sack P. Strauss K. and Montesinos P. 2005. Sesc simulator. http:\/\/sesc.sourceforge.net."},{"key":"e_1_2_1_31_1","article-title":"Low loss ultra-small branches in a silicon photonic wire waveguide","author":"Sakat A.","year":"2002","unstructured":"Sakat , A. , Fukazawa , T. , and Baba , T. 2002 . Low loss ultra-small branches in a silicon photonic wire waveguide . IEEE Trans. Electron. E85C, 4. Sakat, A., Fukazawa, T., and Baba, T. 2002. Low loss ultra-small branches in a silicon photonic wire waveguide. IEEE Trans. Electron. E85C, 4.","journal-title":"IEEE Trans. Electron. E85C, 4."},{"key":"e_1_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2007.35"},{"volume-title":"Proc. SPIE Micromachining Technology for Micro-Optics and Nano-Optics III.","author":"Shaw M.","key":"e_1_2_1_33_1","unstructured":"Shaw , M. , Guo , J. , Vawter , G. , Habermehl , S. , and Sullivan , C . 2005. Fabrication techniques for low loss silicon nitride waveguides . In Proc. SPIE Micromachining Technology for Micro-Optics and Nano-Optics III. Shaw, M., Guo, J., Vawter, G., Habermehl, S., and Sullivan, C. 2005. Fabrication techniques for low loss silicon nitride waveguides. In Proc. SPIE Micromachining Technology for Micro-Optics and Nano-Optics III."},{"key":"e_1_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2001.979422"},{"key":"e_1_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.35"},{"key":"e_1_2_1_36_1","doi-asserted-by":"publisher","DOI":"10.1145\/223982.223990"},{"key":"e_1_2_1_37_1","first-page":"1","article-title":"Ultracompact optical buffers on a silicon chip","volume":"1","author":"Xia F.","year":"2006","unstructured":"Xia , F. , Sekaric , L. , and Vlasov , Y. 2006 . Ultracompact optical buffers on a silicon chip . Nature Photon. 1 , 1 . Xia, F., Sekaric, L., and Vlasov, Y. 2006. Ultracompact optical buffers on a silicon chip. Nature Photon. 1, 1.","journal-title":"Nature Photon."},{"key":"e_1_2_1_38_1","first-page":"3","article-title":"All-optical logic based on silicon micro-ring resonators","volume":"15","author":"Xu Q.","year":"2007","unstructured":"Xu , Q. and Lipson , M. 2007 . All-optical logic based on silicon micro-ring resonators . Opt. Express 15 , 3 . Xu, Q. and Lipson, M. 2007. All-optical logic based on silicon micro-ring resonators. Opt. Express 15, 3.","journal-title":"Opt. Express"},{"key":"e_1_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1364\/OE.15.000430"},{"key":"e_1_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.1109\/JLT.2002.800296"},{"key":"e_1_2_1_41_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2034444"}],"container-title":["ACM Journal on Emerging Technologies in Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1970406.1970411","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1970406.1970411","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T11:05:52Z","timestamp":1750244752000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1970406.1970411"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,6]]},"references-count":41,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2011,6]]}},"alternative-id":["10.1145\/1970406.1970411"],"URL":"https:\/\/doi.org\/10.1145\/1970406.1970411","relation":{},"ISSN":["1550-4832","1550-4840"],"issn-type":[{"type":"print","value":"1550-4832"},{"type":"electronic","value":"1550-4840"}],"subject":[],"published":{"date-parts":[[2011,6]]},"assertion":[{"value":"2010-07-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2011-03-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2011-07-01","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}