{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,21]],"date-time":"2025-06-21T11:26:56Z","timestamp":1750505216083,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":19,"publisher":"ACM","license":[{"start":{"date-parts":[[2011,10,23]],"date-time":"2011-10-23T00:00:00Z","timestamp":1319328000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2011,10,23]]},"DOI":"10.1145\/2039252.2039255","type":"proceedings-article","created":{"date-parts":[[2011,10,25]],"date-time":"2011-10-25T12:23:06Z","timestamp":1319545386000},"page":"1-5","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":10,"title":["Power-efficient networking for balanced system designs"],"prefix":"10.1145","author":[{"given":"John","family":"Byrne","sequence":"first","affiliation":[{"name":"Hewlett Packard Labs, Palo Alto"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jichuan","family":"Chang","sequence":"additional","affiliation":[{"name":"Hewlett Packard Labs, Palo Alto"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kevin T.","family":"Lim","sequence":"additional","affiliation":[{"name":"Hewlett Packard Labs, Palo Alto"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Laura","family":"Ramirez","sequence":"additional","affiliation":[{"name":"Hewlett Packard Labs, Palo Alto"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Parthasarathy","family":"Ranganathan","sequence":"additional","affiliation":[{"name":"Hewlett Packard Labs, Palo Alto"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2011,10,23]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2008.37"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/1629575.1629577"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/1508244.1508270"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2007.443"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/1592568.1592575"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/1592568.1592576"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/1815961.1816004"},{"key":"e_1_3_2_1_8_1","unstructured":"PLX. PEX 8696 96-Lane 24-Port PCIe Gen 2 Switch. http:\/\/www.plxtech.com\/products\/expresslane\/pex8696  PLX. PEX 8696 96-Lane 24-Port PCIe Gen 2 Switch. http:\/\/www.plxtech.com\/products\/expresslane\/pex8696"},{"key":"e_1_3_2_1_9_1","unstructured":"Anil Rao. SeaMicro Technology Overview. http:\/\/www.seamicro.com\/sites\/default\/files\/SM_TO01_64_v1%208.pdf  Anil Rao. SeaMicro Technology Overview. http:\/\/www.seamicro.com\/sites\/default\/files\/SM_TO01_64_v1%208.pdf"},{"key":"e_1_3_2_1_10_1","volume-title":"Fabric Convergence Implications on Systems Architecture. HPCA","author":"Leigh K.","year":"2008","unstructured":"K. Leigh , P. Ranganathan , Fabric Convergence Implications on Systems Architecture. HPCA 2008 . K. Leigh, P. Ranganathan, et al. Fabric Convergence Implications on Systems Architecture. HPCA 2008."},{"key":"e_1_3_2_1_11_1","volume-title":"Using Non-Transparent Bridging in PCI Express Systems","author":"Regula J.","year":"2004","unstructured":"J. Regula . Using Non-Transparent Bridging in PCI Express Systems . 2004 . J. Regula. Using Non-Transparent Bridging in PCI Express Systems. 2004."},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/1508293.1508303"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/1247480.1247522"},{"key":"e_1_3_2_1_14_1","unstructured":"Nsort. http:\/\/www.ordinal.com\/  Nsort. http:\/\/www.ordinal.com\/"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/1559845.1559865"},{"key":"e_1_3_2_1_16_1","unstructured":"Open vSwitch. http:\/\/openvswitch.org\/  Open vSwitch. http:\/\/openvswitch.org\/"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/2018436.2018444"},{"key":"e_1_3_2_1_18_1","volume-title":"MASVDC","author":"Sur S.","year":"2010","unstructured":"S. Sur , H. Wang , Can High-Performance Interconnect Benefit Hadoop Distributed File System? MASVDC 2010 . S. Sur, H. Wang, et al. Can High-Performance Interconnect Benefit Hadoop Distributed File System? MASVDC 2010."},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555789"}],"event":{"name":"SOSP '11: ACM SIGOPS 23nd Symposium on Operating Systems Principles","sponsor":["INESC Systems and Computer Engineering Institute","SIGOPS ACM Special Interest Group on Operating Systems"],"location":"Cascais Portugal","acronym":"SOSP '11"},"container-title":["Proceedings of the 4th Workshop on Power-Aware Computing and Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2039252.2039255","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2039252.2039255","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T09:48:54Z","timestamp":1750240134000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2039252.2039255"}},"subtitle":["early experiences with PCIe"],"short-title":[],"issued":{"date-parts":[[2011,10,23]]},"references-count":19,"alternative-id":["10.1145\/2039252.2039255","10.1145\/2039252"],"URL":"https:\/\/doi.org\/10.1145\/2039252.2039255","relation":{},"subject":[],"published":{"date-parts":[[2011,10,23]]},"assertion":[{"value":"2011-10-23","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}