{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,18]],"date-time":"2025-11-18T12:14:07Z","timestamp":1763468047535,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":20,"publisher":"ACM","license":[{"start":{"date-parts":[[2011,10,23]],"date-time":"2011-10-23T00:00:00Z","timestamp":1319328000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100000143","name":"Division of Computing and Communication Foundations","doi-asserted-by":"publisher","award":["CCF-1117243OCI-0937875"],"award-info":[{"award-number":["CCF-1117243OCI-0937875"]}],"id":[{"id":"10.13039\/100000143","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000105","name":"Office of Cyberinfrastructure","doi-asserted-by":"publisher","award":["CCF-1117243OCI-0937875"],"award-info":[{"award-number":["CCF-1117243OCI-0937875"]}],"id":[{"id":"10.13039\/100000105","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2011,10,23]]},"DOI":"10.1145\/2039252.2039258","type":"proceedings-article","created":{"date-parts":[[2011,10,25]],"date-time":"2011-10-25T12:23:06Z","timestamp":1319545386000},"page":"1-5","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":6,"title":["Energy-aware writes to non-volatile main memory"],"prefix":"10.1145","author":[{"given":"Jie","family":"Chen","sequence":"first","affiliation":[{"name":"George Washington University, Washington DC"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ron C.","family":"Chiang","sequence":"additional","affiliation":[{"name":"George Washington University, Washington DC"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"H. Howie","family":"Huang","sequence":"additional","affiliation":[{"name":"George Washington University, Washington DC"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Guru","family":"Venkataramani","sequence":"additional","affiliation":[{"name":"George Washington University, Washington DC"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2011,10,23]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/FOCS.2006.49"},{"key":"e_1_3_2_1_2_1","volume-title":"CIDR","author":"Chen S.","year":"2011","unstructured":"S. Chen , P. B. Gibbons , and S. Nath . Rethinking database algorithms for phase change memory . In CIDR , 2011 . S. Chen, P. B. Gibbons, and S. Nath. Rethinking database algorithms for phase change memory. In CIDR, 2011."},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669157"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/1629575.1629589"},{"key":"e_1_3_2_1_5_1","unstructured":"Intel Corporation. Intel core i7-920 processor. http:\/\/ark.intel.com\/Product.aspx?id=37147 2010.  Intel Corporation. Intel core i7-920 processor. http:\/\/ark.intel.com\/Product.aspx?id=37147 2010."},{"key":"e_1_3_2_1_6_1","volume-title":"VLDB","author":"Gionis A.","year":"1999","unstructured":"A. Gionis , P. Indyk , and R. Motwani . Similarity search in high dimensions via hashing . In VLDB , 1999 . A. Gionis, P. Indyk, and R. Motwani. Similarity search in high dimensions via hashing. In VLDB, 1999."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/1736020.1736023"},{"key":"e_1_3_2_1_8_1","unstructured":"A Jaleel. Memory characterization of workloads using instrumentation driven simulation. http:\/\/http:\/\/www.glue.umd.edu\/ajaleel\/workload\/ 2010.  A Jaleel. Memory characterization of workloads using instrumentation driven simulation. http:\/\/http:\/\/www.glue.umd.edu\/ajaleel\/workload\/ 2010."},{"key":"e_1_3_2_1_9_1","volume-title":"DATE","author":"Joo Y.","year":"2010","unstructured":"Y. Joo , D. Niu , X. Dong , G. Sun , N. Chang , and Y. Xie . Energy- and endurance-aware design of phase change memory caches . In DATE , 2010 . Y. Joo, D. Niu, X. Dong, G. Sun, N. Chang, and Y. Xie. Energy- and endurance-aware design of phase change memory caches. In DATE, 2010."},{"key":"e_1_3_2_1_10_1","volume-title":"http:\/\/quid.hpl.hp.com:9081\/cacti\/","author":"Labs HP","year":"2010","unstructured":"HP Labs . Cacti 5.3. http:\/\/quid.hpl.hp.com:9081\/cacti\/ , 2010 . HP Labs. Cacti 5.3. http:\/\/quid.hpl.hp.com:9081\/cacti\/, 2010."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555758"},{"volume-title":"Phase change memory: A new memory to enable new memory usage models. White Paper http:\/\/www.numonyx.com\/","year":"2009","key":"e_1_3_2_1_12_1","unstructured":"Numonyx. Phase change memory: A new memory to enable new memory usage models. White Paper http:\/\/www.numonyx.com\/ , 2009 . Numonyx. Phase change memory: A new memory to enable new memory usage models. White Paper http:\/\/www.numonyx.com\/, 2009."},{"key":"e_1_3_2_1_13_1","unstructured":"Devices Process Integration and Structures. International technology roadmap for semiconductors. http:\/\/www.itrs.net 2007.  Devices Process Integration and Structures. International technology roadmap for semiconductors. http:\/\/www.itrs.net 2007."},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669117"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555760"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1147\/rd.524.0465"},{"volume-title":"SESC","key":"e_1_3_2_1_17_1","unstructured":"Jose Renau SESC . http:\/\/sesc.sourceforge.net, 2006. Jose Renau et al. SESC. http:\/\/sesc.sourceforge.net, 2006."},{"key":"e_1_3_2_1_18_1","volume-title":"http:\/\/www.spec.org","author":"Standard Performance Evaluation Corporation","year":"2006","unstructured":"Standard Performance Evaluation Corporation . SPEC Benchmarks . http:\/\/www.spec.org , 2006 . Standard Performance Evaluation Corporation. SPEC Benchmarks. http:\/\/www.spec.org, 2006."},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2007.377981"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555759"}],"event":{"name":"SOSP '11: ACM SIGOPS 23nd Symposium on Operating Systems Principles","sponsor":["INESC Systems and Computer Engineering Institute","SIGOPS ACM Special Interest Group on Operating Systems"],"location":"Cascais Portugal","acronym":"SOSP '11"},"container-title":["Proceedings of the 4th Workshop on Power-Aware Computing and Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2039252.2039258","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2039252.2039258","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T09:48:54Z","timestamp":1750240134000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2039252.2039258"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,10,23]]},"references-count":20,"alternative-id":["10.1145\/2039252.2039258","10.1145\/2039252"],"URL":"https:\/\/doi.org\/10.1145\/2039252.2039258","relation":{},"subject":[],"published":{"date-parts":[[2011,10,23]]},"assertion":[{"value":"2011-10-23","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}