{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:26:54Z","timestamp":1750307214065,"version":"3.41.0"},"reference-count":11,"publisher":"Association for Computing Machinery (ACM)","issue":"4","license":[{"start":{"date-parts":[[2011,12,19]],"date-time":"2011-12-19T00:00:00Z","timestamp":1324252800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["SIGARCH Comput. Archit. News"],"published-print":{"date-parts":[[2011,12,19]]},"abstract":"<jats:p>Nowadays, System-on-Chip architectures are composed of several execution resources which support complex applications. As it shares silicon area and limits the cost of the global circuit, the embedding of a reconfigurable resource in these SoC provides flexibility to the hardware. In this case, several implementations of the same algorithm, offering different characteristics, can be considered in order to optimize performances. In general, the tasks mapped on reconfigurable resources are algorithms that can be defined through several levels of parallelism. Clearly, parallelism directly affects the area and the execution time, this paper shows that the energy consumption is not constant, and decreases when the parallelism grows up.<\/jats:p>","DOI":"10.1145\/2082156.2082186","type":"journal-article","created":{"date-parts":[[2011,12,27]],"date-time":"2011-12-27T15:22:22Z","timestamp":1324999342000},"page":"104-105","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":4,"title":["Parallelism Level Impact on Energy Consumption in Reconfigurable Devices"],"prefix":"10.1145","volume":"39","author":[{"given":"Robin","family":"Bonamy","sequence":"first","affiliation":[{"name":"IRISA - CNRS UMR 6074, INRIA Rennes Bretagne Atlantique"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Daniel","family":"Chillet","sequence":"additional","affiliation":[{"name":"IRISA - CNRS UMR 6074, INRIA Rennes Bretagne Atlantique"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Olivier","family":"Sentieys","sequence":"additional","affiliation":[{"name":"IRISA - CNRS UMR 6074, INRIA Rennes Bretagne Atlantique"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sebastien","family":"Bilavarn","sequence":"additional","affiliation":[{"name":"University of Nice Sophia Antipolis"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2011,12,19]]},"reference":[{"key":"e_1_2_1_1_1","volume-title":"AN 531: Reducing Power with Hardware Accelerators","author":"Altera Corporation","year":"2008","unstructured":"Altera Corporation , AN 531: Reducing Power with Hardware Accelerators , 2008 Altera Corporation, AN 531: Reducing Power with Hardware Accelerators, 2008"},{"volume-title":"Field Programmable Logic and Applications, FPL","year":"2007","key":"e_1_2_1_2_1","unstructured":"Pao-Ann Hsiung , Exploiting Hardware and Software Low power Techniques for Energy Efficient Co-Scheduling in Dynamically Reconfigurable Systems , Field Programmable Logic and Applications, FPL , Amsterdam, August 2007 Pao-Ann Hsiung, Exploiting Hardware and Software Low power Techniques for Energy Efficient Co-Scheduling in Dynamically Reconfigurable Systems, Field Programmable Logic and Applications, FPL, Amsterdam, August 2007"},{"key":"e_1_2_1_3_1","volume-title":"Parallel and Distributed Processing Symposium. IPDPS, Rhodes Island","author":"O.","year":"2006","unstructured":"Kwok T.T.- O. et al., Practical design of a computation and energy efficient hardware task scheduler in embedded reconfigurable computing systems , Parallel and Distributed Processing Symposium. IPDPS, Rhodes Island , April 2006 Kwok T.T.-O. et al., Practical design of a computation and energy efficient hardware task scheduler in embedded reconfigurable computing systems, Parallel and Distributed Processing Symposium. IPDPS, Rhodes Island, April 2006"},{"key":"e_1_2_1_4_1","volume-title":"Combining Optimizations in Automated Low Power Design in Proceedings of the Conference on Design, Automation and Test in Europe, DATE '10","author":"Liu Q.","year":"2010","unstructured":"Q. Liu , Combining Optimizations in Automated Low Power Design in Proceedings of the Conference on Design, Automation and Test in Europe, DATE '10 , Dresden, Germany , March 2010 Q. Liu et al., Combining Optimizations in Automated Low Power Design in Proceedings of the Conference on Design, Automation and Test in Europe, DATE '10, Dresden, Germany, March 2010"},{"key":"e_1_2_1_5_1","volume-title":"Automation & Test in Europe Conference & Exhibition, DATE '07","author":"Srikanth K.","year":"2007","unstructured":"K. Srikanth , Automation & Test in Europe Conference & Exhibition, DATE '07 , Nice, France , April 2007 K. Srikanth et al., The Impact of Loop Unrolling on Controller Delay in High Level Synthesis, Design, Automation & Test in Europe Conference & Exhibition, DATE '07, Nice, France, April 2007"},{"key":"e_1_2_1_6_1","first-page":"119","volume-title":"VLSI Digital Signal Processing Systems: Design and Implementation","author":"Parhi K.K.","year":"1999","unstructured":"K.K. Parhi , VLSI Digital Signal Processing Systems: Design and Implementation , John Wiley , pp. 119 -- 147 , 1999 K.K. Parhi, VLSI Digital Signal Processing Systems: Design and Implementation, John Wiley, pp. 119--147, 1999"},{"key":"e_1_2_1_7_1","volume-title":"International Workshop on Applied Reconfigurable Computing","author":"Buyukkurt B.","year":"2006","unstructured":"B. Buyukkurt : C to VHDL Compiler for FPGAs , In International Workshop on Applied Reconfigurable Computing , Delft, The Netherlands , March 2006 B. Buyukkurt et al., Impact of Loop Unrolling on Area, Throughput and Clock Frequency in ROCCC: C to VHDL Compiler for FPGAs, In International Workshop on Applied Reconfigurable Computing, Delft, The Netherlands, March 2006"},{"key":"e_1_2_1_8_1","unstructured":"Optimizing Impulse C Code for Performance Application Note IATAPP-102 http:\/\/www.impulseaccelerated.com\/AppNotes\/  Optimizing Impulse C Code for Performance Application Note IATAPP-102 http:\/\/www.impulseaccelerated.com\/AppNotes\/"},{"key":"e_1_2_1_9_1","unstructured":"Mentor Catapult C Synthesis http:\/\/www.mentor.com\/products\/esl\/high_level_synthesis\/catapult_synthesis\/  Mentor Catapult C Synthesis http:\/\/www.mentor.com\/products\/esl\/high_level_synthesis\/catapult_synthesis\/"},{"key":"e_1_2_1_10_1","unstructured":"GeCoS - Generic Compiler Suite http:\/\/gecos.gforge.inria.fr\/  GeCoS - Generic Compiler Suite http:\/\/gecos.gforge.inria.fr\/"},{"key":"e_1_2_1_11_1","unstructured":"Open-PEOPLE - Open-Power and Energy Optimization PLatform and Estimator http:\/\/www.open-people.fr\/  Open-PEOPLE - Open-Power and Energy Optimization PLatform and Estimator http:\/\/www.open-people.fr\/"}],"container-title":["ACM SIGARCH Computer Architecture News"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2082156.2082186","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2082156.2082186","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T10:06:42Z","timestamp":1750241202000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2082156.2082186"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,12,19]]},"references-count":11,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2011,12,19]]}},"alternative-id":["10.1145\/2082156.2082186"],"URL":"https:\/\/doi.org\/10.1145\/2082156.2082186","relation":{},"ISSN":["0163-5964"],"issn-type":[{"type":"print","value":"0163-5964"}],"subject":[],"published":{"date-parts":[[2011,12,19]]},"assertion":[{"value":"2011-12-19","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}