{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:26:15Z","timestamp":1750307175615,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":14,"publisher":"ACM","license":[{"start":{"date-parts":[[2012,2,22]],"date-time":"2012-02-22T00:00:00Z","timestamp":1329868800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2012,2,22]]},"DOI":"10.1145\/2145694.2145755","type":"proceedings-article","created":{"date-parts":[[2012,2,22]],"date-time":"2012-02-22T18:42:35Z","timestamp":1329936155000},"page":"269-269","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["Dataflow-driven execution control in a coarse-grained reconfigurable array (abstract only)"],"prefix":"10.1145","author":[{"given":"Robin","family":"Panda","sequence":"first","affiliation":[{"name":"University of Washington, Seattle, WA, USA"}]},{"given":"Scott","family":"Hauck","sequence":"additional","affiliation":[{"name":"University of Washington, Seattle, WA, USA"}]}],"member":"320","published-online":{"date-parts":[[2012,2,22]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2011.47"},{"key":"e_1_3_2_1_2_1","volume-title":"FPL 2009. International Conference on (Sept.","author":"Van Essen B.","year":"2009","unstructured":"Van Essen , B. , Wood , A. , Carroll , A. et al. \"Static versus scheduled interconnect in Coarse-Grained Reconfigurable Arrays\" In Field Programmable Logic and Applications, 2009 . FPL 2009. International Conference on (Sept. 2009 ), 268--275. Van Essen, B., Wood, A., Carroll, A. et al. \"Static versus scheduled interconnect in Coarse-Grained Reconfigurable Arrays\" In Field Programmable Logic and Applications, 2009. FPL 2009. International Conference on (Sept. 2009), 268--275."},{"key":"e_1_3_2_1_3_1","unstructured":"Halfhill Tom R. \"Tabula's Time Machine\" Microprocessor Report (Mar. 29 2010).  Halfhill Tom R. \"Tabula's Time Machine\" Microprocessor Report (Mar. 29 2010)."},{"key":"e_1_3_2_1_4_1","unstructured":"http:\/\/www.impulseaccelerated.com\/ Impulse Accelerated Technologie.  http:\/\/www.impulseaccelerated.com\/ Impulse Accelerated Technologie."},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2004.65"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/1508128.1508158"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/192724.192731"},{"key":"e_1_3_2_1_8_1","first-page":"231","article-title":"FPGA vs. MPPA for Positron Emission Tomography pulse processing","author":"Haselman M.","year":"2009","unstructured":"Haselman , M. , Johnson-Williams , N. , Jerde , C. , Kim , M. , Hauck , S. , Lewellen , T.K. , and Miyaoka , R . \" FPGA vs. MPPA for Positron Emission Tomography pulse processing \" In International Conference on Field-Programmable Technolog ( Dec. 2009 ), 231 -- 238 . Haselman, M., Johnson-Williams, N., Jerde, C., Kim, M., Hauck, S., Lewellen, T.K., and Miyaoka, R. \"FPGA vs. MPPA for Positron Emission Tomography pulse processing\" In International Conference on Field-Programmable Technolog (Dec. 2009), 231--238.","journal-title":"International Conference on Field-Programmable Technolog"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2002.997877"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2013772"},{"key":"e_1_3_2_1_11_1","unstructured":"Ambric Inc. Am2000 Family Architecture Reference. 2008.  Ambric Inc. Am2000 Family Architecture Reference. 2008."},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2010.63"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2001947"},{"key":"e_1_3_2_1_14_1","volume-title":"Computer Architecture: A Quantitative Approach","author":"Hennessy J. L.","year":"2007","unstructured":"Hennessy , J. L. and Patterson , D. A . Computer Architecture: A Quantitative Approach . 2007 . Hennessy, J. L. and Patterson, D. A. Computer Architecture: A Quantitative Approach. 2007."}],"event":{"name":"FPGA '12: ACM\/SIGDA International Symposium on Field Programmable Gate Arrays","sponsor":["SIGDA ACM Special Interest Group on Design Automation"],"location":"Monterey California USA","acronym":"FPGA '12"},"container-title":["Proceedings of the ACM\/SIGDA international symposium on Field Programmable Gate Arrays"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2145694.2145755","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T09:54:52Z","timestamp":1750240492000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2145694.2145755"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,2,22]]},"references-count":14,"alternative-id":["10.1145\/2145694.2145755","10.1145\/2145694"],"URL":"https:\/\/doi.org\/10.1145\/2145694.2145755","relation":{},"subject":[],"published":{"date-parts":[[2012,2,22]]},"assertion":[{"value":"2012-02-22","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}