{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,24]],"date-time":"2025-10-24T16:36:48Z","timestamp":1761323808583,"version":"3.41.0"},"reference-count":20,"publisher":"Association for Computing Machinery (ACM)","issue":"1","license":[{"start":{"date-parts":[[2012,3,1]],"date-time":"2012-03-01T00:00:00Z","timestamp":1330560000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Embed. Comput. Syst."],"published-print":{"date-parts":[[2012,3]]},"abstract":"<jats:p>Traffic shaping is a well-known technique in the area of networking and is proven to reduce global buffer requirements and end-to-end delays in networked systems. Due to these properties, shapers also play an increasingly important role in the design of multiprocessor embedded systems that exhibit a considerable amount of on-chip traffic. Despite the growing importance of traffic shapping in this area, no methods exist for analyzing shapers in distributed embedded systems and for incorporating them into a system-level performance analysis. Until now it was not possible to determine the effect of shapers on end-to-end delay guarantees or buffer requirements in such systems. In this work, we present a method for analyzing greedy shapers, and we embed this analysis method into a well-established modular performance analysis framework for real-time embedded systems. The presented approach enables system-level performance analysis of complete systems with greedy shapers, and we prove its applicability by analyzing three case study systems.<\/jats:p>","DOI":"10.1145\/2146417.2146418","type":"journal-article","created":{"date-parts":[[2012,4,3]],"date-time":"2012-04-03T14:56:22Z","timestamp":1333464982000},"page":"1-22","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":12,"title":["On the use of greedy shapers in real-time embedded systems"],"prefix":"10.1145","volume":"11","author":[{"given":"Ernesto","family":"Wandeler","sequence":"first","affiliation":[{"name":"ETH Zurich, Switzerland"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alexander","family":"Maxiaguine","sequence":"additional","affiliation":[{"name":"ETH Zurich, Switzerland"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Lothar","family":"Thiele","sequence":"additional","affiliation":[{"name":"ETH Zurich, Switzerland"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2012,4,5]]},"reference":[{"volume-title":"Proceedings of the 6th Design, Automation and Test in Europe (DATE). 190--195","author":"Chakraborty S.","key":"e_1_2_1_1_1","unstructured":"Chakraborty , S. , K\u00fcnzli , S. , and Thiele , L . 2003. A general framework for analyzing system properties in platform-based embedded system designs . In Proceedings of the 6th Design, Automation and Test in Europe (DATE). 190--195 . Chakraborty, S., K\u00fcnzli, S., and Thiele, L. 2003. A general framework for analyzing system properties in platform-based embedded system designs. In Proceedings of the 6th Design, Automation and Test in Europe (DATE). 190--195."},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1016\/S1389-1286(02)00454-1"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/18.61109"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.5555\/871910.871923"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/65.752648"},{"key":"e_1_2_1_6_1","volume-title":"Lecture Notes in Computer Science","volume":"2050","author":"Le Boudec J.","unstructured":"Le Boudec , J. and Thiran , P . 2001. Network Calculus\u2014A Theory of Deterministic Queuing Systems for the Internet . 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