{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,18]],"date-time":"2025-11-18T12:14:42Z","timestamp":1763468082680,"version":"3.41.0"},"reference-count":19,"publisher":"Association for Computing Machinery (ACM)","issue":"7","license":[{"start":{"date-parts":[[2012,7,1]],"date-time":"2012-07-01T00:00:00Z","timestamp":1341100800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["Commun. ACM"],"published-print":{"date-parts":[[2012,7]]},"abstract":"<jats:p>The past 10 years have delivered two significant revolutions. (1) Microprocessor design has been transformed by the limits of chip power, wire latency, and Dennard scaling---leading to multicore processors and heterogeneity. (2) Managed languages and an entirely new software landscape emerged---revolutionizing how software is deployed, is sold, and interacts with hardware. Researchers most often examine these changes in isolation. Architects mostly grapple with microarchitecture design through the narrow software context of native sequential SPEC CPU benchmarks, while language researchers mostly consider microarchitecture in terms of performance alone. This work explores the clash of these two revolutions over the past decade by measuring power, performance, energy, and scaling, and considers what the results may mean for the future. Our diverse findings include the following: (a) native sequential workloads do not approximate managed workloads or even native parallel workloads; (b) diverse application power profiles suggest that future applications and system software will need to participate in power optimization and management; and (c) software and hardware researchers need access to real measurements to optimize for power and energy.<\/jats:p>","DOI":"10.1145\/2209249.2209272","type":"journal-article","created":{"date-parts":[[2012,6,20]],"date-time":"2012-06-20T13:32:56Z","timestamp":1340199176000},"page":"105-114","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":25,"title":["Looking back and looking forward"],"prefix":"10.1145","volume":"55","author":[{"given":"Hadi","family":"Esmaeilzadeh","sequence":"first","affiliation":[{"name":"University of Washington"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ting","family":"Cao","sequence":"additional","affiliation":[{"name":"Australian National University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xi","family":"Yang","sequence":"additional","affiliation":[{"name":"Australian National University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Stephen M.","family":"Blackburn","sequence":"additional","affiliation":[{"name":"Australian National University"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kathryn S.","family":"McKinley","sequence":"additional","affiliation":[{"name":"University of Texas at Austin, Austin, TX"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2012,7]]},"reference":[{"doi-asserted-by":"publisher","key":"e_1_2_1_1_1","DOI":"10.1145\/1815961.1815967"},{"doi-asserted-by":"publisher","key":"e_1_2_1_2_1","DOI":"10.1145\/1378704.1378723"},{"key":"e_1_2_1_3_1","first-page":"1","article-title":"year retrospective on Dennard's MOSFET scaling paper","volume":"12","author":"Bohr M.","year":"2007","unstructured":"Bohr , M. A 30 year retrospective on Dennard's MOSFET scaling paper . IEEE SSCS Newsletter 12 , 1 ( 2007 ), 11--13 (http:\/\/dx.doi.org\/10.1109\/N-SSC.2007.4785534). 10.1109\/N-SSC.2007.4785534) Bohr, M. A 30 year retrospective on Dennard's MOSFET scaling paper. IEEE SSCS Newsletter 12, 1 (2007), 11--13 (http:\/\/dx.doi.org\/10.1109\/N-SSC.2007.4785534).","journal-title":"IEEE SSCS Newsletter"},{"doi-asserted-by":"publisher","key":"e_1_2_1_4_1","DOI":"10.1145\/1840845.1840883"},{"doi-asserted-by":"publisher","key":"e_1_2_1_5_1","DOI":"10.1145\/800015.808199"},{"doi-asserted-by":"publisher","key":"e_1_2_1_6_1","DOI":"10.1145\/2000064.2000108"},{"doi-asserted-by":"publisher","key":"e_1_2_1_7_1","DOI":"10.1145\/1250662.1250665"},{"doi-asserted-by":"publisher","key":"e_1_2_1_8_1","DOI":"10.1109\/MM.2011.77"},{"doi-asserted-by":"publisher","key":"e_1_2_1_9_1","DOI":"10.5555\/545215.545218"},{"doi-asserted-by":"publisher","key":"e_1_2_1_10_1","DOI":"10.5555\/956417.956567"},{"key":"e_1_2_1_11_1","volume-title":"International technology roadmap for semiconductors","author":"ITRS Working Group","year":"2011","unstructured":"ITRS Working Group . International technology roadmap for semiconductors , 2011 . ITRS Working Group. International technology roadmap for semiconductors, 2011."},{"key":"e_1_2_1_12_1","volume-title":"HotPower","author":"Le Sueur E.","year":"2010","unstructured":"Le Sueur , E. , Heiser , G. Dynamic voltage and frequency scaling: the laws of diminishing returns . In HotPower ( 2010 ). Le Sueur, E., Heiser, G. Dynamic voltage and frequency scaling: the laws of diminishing returns. In HotPower (2010)."},{"doi-asserted-by":"publisher","key":"e_1_2_1_13_1","DOI":"10.1145\/1669112.1669172"},{"doi-asserted-by":"publisher","key":"e_1_2_1_14_1","DOI":"10.1109\/HPCA.2006.1598109"},{"key":"e_1_2_1_15_1","first-page":"8","article-title":"Cramming more components onto integrated circuits","volume":"38","author":"Moore G.E","year":"1965","unstructured":"Moore , G.E . Cramming more components onto integrated circuits . Electronics 38 , 8 (19 Apr 1965 ), 114--117. Moore, G.E. Cramming more components onto integrated circuits. Electronics 38, 8 (19 Apr 1965), 114--117.","journal-title":"Electronics"},{"doi-asserted-by":"publisher","key":"e_1_2_1_16_1","DOI":"10.1109\/2.917539"},{"doi-asserted-by":"publisher","key":"e_1_2_1_17_1","DOI":"10.1145\/1006209.1006238"},{"key":"e_1_2_1_18_1","volume-title":"Inside Intel next generation Nehalem microarchitecture. Intel Developer Forum (IDF) presentation (August","author":"Singhal R.","year":"2008","unstructured":"Singhal , R. Inside Intel next generation Nehalem microarchitecture. Intel Developer Forum (IDF) presentation (August 2008 ), 2011. Singhal, R. Inside Intel next generation Nehalem microarchitecture. Intel Developer Forum (IDF) presentation (August 2008), 2011."},{"doi-asserted-by":"publisher","key":"e_1_2_1_19_1","DOI":"10.1145\/223982.224449"}],"container-title":["Communications of the ACM"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2209249.2209272","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2209249.2209272","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T09:21:10Z","timestamp":1750238470000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2209249.2209272"}},"subtitle":["power, performance, and upheaval"],"short-title":[],"issued":{"date-parts":[[2012,7]]},"references-count":19,"journal-issue":{"issue":"7","published-print":{"date-parts":[[2012,7]]}},"alternative-id":["10.1145\/2209249.2209272"],"URL":"https:\/\/doi.org\/10.1145\/2209249.2209272","relation":{},"ISSN":["0001-0782","1557-7317"],"issn-type":[{"type":"print","value":"0001-0782"},{"type":"electronic","value":"1557-7317"}],"subject":[],"published":{"date-parts":[[2012,7]]},"assertion":[{"value":"2012-07-01","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}