{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:24:03Z","timestamp":1750307043155,"version":"3.41.0"},"reference-count":21,"publisher":"Association for Computing Machinery (ACM)","issue":"2","license":[{"start":{"date-parts":[[2012,7,1]],"date-time":"2012-07-01T00:00:00Z","timestamp":1341100800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100000143","name":"Division of Computing and Communication Foundations","doi-asserted-by":"publisher","award":["CCF-0916652CCF-1055084 (CAREER)"],"award-info":[{"award-number":["CCF-0916652CCF-1055084 (CAREER)"]}],"id":[{"id":"10.13039\/100000143","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100004085","name":"Ministry of Education, Science and Technology","doi-asserted-by":"publisher","award":["2010-0011534"],"award-info":[{"award-number":["2010-0011534"]}],"id":[{"id":"10.13039\/501100004085","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000151","name":"Division of Industrial Innovation and Partnerships","doi-asserted-by":"publisher","award":["IIP-0856090"],"award-info":[{"award-number":["IIP-0856090"]}],"id":[{"id":"10.13039\/100000151","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Embed. Comput. Syst."],"published-print":{"date-parts":[[2012,7]]},"abstract":"<jats:p>Processor Idle Cycle Aggregation (PICA) is a promising approach for low-power execution of processors, in which small memory stalls are aggregated to create large ones, enabling profitable switch of the processor into low-power mode. We extend the previous approach in three dimensions. First we develop static analysis for the PICA technique and present optimal parameters for five common types of loops based on steady-state analysis. Second, to remedy the weakness of software-only control in varying environment, we enhance PICA with minimal hardware extension that ensures correct execution for any loops and parameters, thus greatly facilitating exploration-based parameter tuning. Third, we demonstrate that our PICA technique can be applied to certain types of nested loops with variable bounds, thus enhancing the applicability of PICA. We validate our analytical model against simulation-based optimization and also show, through our experiments on embedded application benchmarks, that our technique can be applied to a wide range of loops with average 20% energy reductions, compared to executions without PICA.<\/jats:p>","DOI":"10.1145\/2220336.2220338","type":"journal-article","created":{"date-parts":[[2012,7,31]],"date-time":"2012-07-31T13:42:45Z","timestamp":1343742165000},"page":"1-27","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["PICA"],"prefix":"10.1145","volume":"11","author":[{"given":"Jongeun","family":"Lee","sequence":"first","affiliation":[{"name":"Ulsan National Institute of Science and Technology"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Aviral","family":"Shrivastava","sequence":"additional","affiliation":[{"name":"Arizona State University"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2012,7]]},"reference":[{"volume-title":"Proceedings of the Conference on Design, Automation and Test in Europe (DATE\u201902)","author":"Azevedo A.","key":"e_1_2_1_1_1"},{"doi-asserted-by":"publisher","key":"e_1_2_1_2_1","DOI":"10.1109\/92.845896"},{"volume-title":"Proc. 6th ACM\/IEEE Design and Test in Europe Conf","author":"Brockmeyer E.","key":"e_1_2_1_3_1"},{"doi-asserted-by":"publisher","key":"e_1_2_1_4_1","DOI":"10.1145\/344166.344181"},{"doi-asserted-by":"publisher","key":"e_1_2_1_5_1","DOI":"10.1145\/381694.378859"},{"doi-asserted-by":"publisher","key":"e_1_2_1_6_1","DOI":"10.1109\/TCAD.2004.839485(410) 24"},{"doi-asserted-by":"publisher","key":"e_1_2_1_7_1","DOI":"10.1145\/263580.263657"},{"doi-asserted-by":"publisher","key":"e_1_2_1_8_1","DOI":"10.1145\/277044.277226"},{"volume-title":"Proceedings of the Conference on Design, Automation and Test in Europe. 202--207","author":"Issenin I.","key":"e_1_2_1_9_1"},{"doi-asserted-by":"publisher","key":"e_1_2_1_10_1","DOI":"10.1145\/513918.514077"},{"doi-asserted-by":"crossref","unstructured":"Lee J. and Shrivastava A. 2008. Static analysis of processor stall cycle aggregation. http:\/\/www.public.asu.edu\/~ashriva6\/papers\/pica.html. Lee J. and Shrivastava A. 2008. Static analysis of processor stall cycle aggregation. http:\/\/www.public.asu.edu\/~ashriva6\/papers\/pica.html.","key":"e_1_2_1_11_1","DOI":"10.1145\/1450135.1450143"},{"key":"e_1_2_1_12_1","first-page":"229","article-title":"System level architecture evaluation and optimization: An industrial case study with AMBA3 AXI","volume":"5","author":"Lee J.-E.","year":"2005","journal-title":"J. Semiconductor Technol. Sci."},{"key":"e_1_2_1_13_1","article-title":"Memory bandwidth and machine balance in current high performance computers. IEEE","author":"McCalpin J. D.","year":"1995","journal-title":"Comput. Soc. Tech. Comm. Comput. Architect. Newsl., 19--25."},{"doi-asserted-by":"publisher","key":"e_1_2_1_14_1","DOI":"10.1145\/143365.143488"},{"doi-asserted-by":"crossref","unstructured":"Rabaey J. and Pedram M. Eds. 1996. Low Power Design Methodologies. Kluwer Academic Publishers Norwell MA. Rabaey J. and Pedram M. Eds. 1996. Low Power Design Methodologies . Kluwer Academic Publishers Norwell MA.","key":"e_1_2_1_15_1","DOI":"10.1007\/978-1-4615-2307-9"},{"doi-asserted-by":"publisher","key":"e_1_2_1_16_1","DOI":"10.1145\/1084834.1084876"},{"doi-asserted-by":"publisher","key":"e_1_2_1_17_1","DOI":"10.1145\/1755951.1755910"},{"doi-asserted-by":"publisher","key":"e_1_2_1_18_1","DOI":"10.1109\/L-CA.2002.3"},{"doi-asserted-by":"publisher","key":"e_1_2_1_19_1","DOI":"10.1145\/358923.358939"},{"doi-asserted-by":"publisher","key":"e_1_2_1_20_1","DOI":"10.1007\/s00453-006-1231-0"},{"volume-title":"Proceedings of the International Conference on Signal Processing Applications and Technology (ICSPAT\u201994)","author":"Zivojnovic V.","key":"e_1_2_1_21_1"}],"container-title":["ACM Transactions on Embedded Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2220336.2220338","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2220336.2220338","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T09:20:57Z","timestamp":1750238457000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2220336.2220338"}},"subtitle":["Processor Idle Cycle Aggregation for Energy-Efficient Embedded Systems"],"short-title":[],"issued":{"date-parts":[[2012,7]]},"references-count":21,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2012,7]]}},"alternative-id":["10.1145\/2220336.2220338"],"URL":"https:\/\/doi.org\/10.1145\/2220336.2220338","relation":{},"ISSN":["1539-9087","1558-3465"],"issn-type":[{"type":"print","value":"1539-9087"},{"type":"electronic","value":"1558-3465"}],"subject":[],"published":{"date-parts":[[2012,7]]},"assertion":[{"value":"2008-07-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2011-05-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2012-07-01","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}