{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,18]],"date-time":"2025-11-18T12:14:32Z","timestamp":1763468072681,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":20,"publisher":"ACM","license":[{"start":{"date-parts":[[2012,6,3]],"date-time":"2012-06-03T00:00:00Z","timestamp":1338681600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2012,6,3]]},"DOI":"10.1145\/2228360.2228434","type":"proceedings-article","created":{"date-parts":[[2012,5,31]],"date-time":"2012-05-31T12:10:51Z","timestamp":1338466251000},"page":"412-420","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":35,"title":["WCET-centric partial instruction cache locking"],"prefix":"10.1145","author":[{"given":"Huping","family":"Ding","sequence":"first","affiliation":[{"name":"National University of Singapore"}]},{"given":"Yun","family":"Liang","sequence":"additional","affiliation":[{"name":"Advanced Digital Sciences Center, Illinois at Singapore"}]},{"given":"Tulika","family":"Mitra","sequence":"additional","affiliation":[{"name":"National University of Singapore"}]}],"member":"320","published-online":{"date-parts":[[2012,6,3]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"RTNS","author":"Arnaud A.","year":"2006","unstructured":"A. Arnaud and I. Puaut . Dynamic instruction cache locking in hard real-time systems . In RTNS , 2006 . A. Arnaud and I. Puaut. Dynamic instruction cache locking in hard real-time systems. In RTNS, 2006."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1177\/109434200001400404"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/268806.268810"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/ECRTS.2005.34"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1630101"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/1289816.1289853"},{"issue":"4","key":"e_1_3_2_1_7_1","doi-asserted-by":"crossref","DOI":"10.3233\/EMC-2005-00045","volume":"1","author":"Guillon C.","year":"2005","unstructured":"C. Guillon , F. Rastello , T. Bidault , and F. Bouchez . Procedure placement using temporal-ordering information: Dealing with code size expansion. J. Embedded Comput. , 1 ( 4 ), 2005 . C. Guillon, F. Rastello, T. Bidault, and F. Bouchez. Procedure placement using temporal-ordering information: Dealing with code size expansion. J. Embedded Comput., 1(4), 2005.","journal-title":"J. Embedded Comput."},{"key":"e_1_3_2_1_8_1","volume-title":"WCET","author":"Gustafsson J.","year":"2010","unstructured":"J. Gustafsson , A. Betts , A. Ermedahl , and B. Lisper . The M\u00e4lardalen WCET benchmarks -- past, present and future . In WCET , 2010 . J. Gustafsson, A. Betts, A. Ermedahl, and B. Lisper. The M\u00e4lardalen WCET benchmarks -- past, present and future. In WCET, 2010."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.scico.2007.01.014"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.5555\/827268.828947"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/1391469.1391551"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/1878921.1878944"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837362"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/RTAS.2009.11"},{"key":"e_1_3_2_1_15_1","volume-title":"CC","author":"Martin F.","year":"1998","unstructured":"F. Martin , M. Alt , R. Wilhelm , and C. Ferdinand . Analysis of loops . In CC , 1998 . F. Martin, M. Alt, R. Wilhelm, and C. Ferdinand. Analysis of loops. In CC, 1998."},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.5555\/827272.829141"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/1391469.1391545"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/RTSS.2005.45"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008141130870"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/885651.781062"}],"event":{"name":"DAC '12: The 49th Annual Design Automation Conference 2012","sponsor":["EDAC Electronic Design Automation Consortium","SIGDA ACM Special Interest Group on Design Automation","IEEE-CEDA","SIGBED ACM Special Interest Group on Embedded Systems"],"location":"San Francisco California","acronym":"DAC '12"},"container-title":["Proceedings of the 49th Annual Design Automation Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2228360.2228434","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2228360.2228434","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T08:49:02Z","timestamp":1750236542000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2228360.2228434"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,6,3]]},"references-count":20,"alternative-id":["10.1145\/2228360.2228434","10.1145\/2228360"],"URL":"https:\/\/doi.org\/10.1145\/2228360.2228434","relation":{},"subject":[],"published":{"date-parts":[[2012,6,3]]},"assertion":[{"value":"2012-06-03","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}