{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:24:02Z","timestamp":1750307042655,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":19,"publisher":"ACM","license":[{"start":{"date-parts":[[2012,6,29]],"date-time":"2012-06-29T00:00:00Z","timestamp":1340928000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2012,6,29]]},"DOI":"10.1145\/2318916.2318929","type":"proceedings-article","created":{"date-parts":[[2012,7,3]],"date-time":"2012-07-03T11:53:15Z","timestamp":1341316395000},"page":"1-8","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["Node-based memory management for scalable NUMA architectures"],"prefix":"10.1145","author":[{"given":"Stefan","family":"Lankes","sequence":"first","affiliation":[{"name":"RWTH Aachen University, Aachen, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Thomas","family":"Bemmerl","sequence":"additional","affiliation":[{"name":"RWTH Aachen University, Aachen, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Thomas","family":"Roehl","sequence":"additional","affiliation":[{"name":"RWTH Aachen University, Aachen, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Christian","family":"Terboven","sequence":"additional","affiliation":[{"name":"RWTH Aachen University, Aachen, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2012,6,29]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.5555\/370049.370455"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-02303-3_7"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2010.31"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2009.5161101"},{"key":"e_1_3_2_1_5_1","author":"Klug T.","year":"2008","unstructured":"T. Klug , M. Ott , J. Weidendorfer , and C. Trinitis . autopin - Automated Optimization of Thread-to-Core Pinning on Multicore Systems. Transactions on High-Performance Embedded Architectures and Compilers (Transactions on HiPEAC), pages 219--235 , 2008 . T. Klug, M. Ott, J. Weidendorfer, and C. Trinitis. autopin - Automated Optimization of Thread-to-Core Pinning on Multicore Systems. Transactions on High-Performance Embedded Architectures and Compilers (Transactions on HiPEAC), pages 219--235, 2008.","journal-title":"Transactions on High-Performance Embedded Architectures and Compilers (Transactions on HiPEAC), pages 219--235"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.5555\/1882792.1882861"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/2141702.2141708"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/264107.264206"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/1088149.1088201"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/1122971.1122987"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/SC.2010.53"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.5555\/370049.370454"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"crossref","first-page":"85","DOI":"10.1007\/3-540-40889-4_7","volume-title":"Languages, Compilers, and Run-Time Systems for Scalable Computers","author":"Nikolopoulos D. S.","year":"2000","unstructured":"D. S. Nikolopoulos , T. S. Papatheodorou , C. D. Polychronopoulos , J. Labarta , and E. Ayguad\u00e9 . UPMLIB: A Runtime System for Tuning the Memory Performance of OpenMP Programs on Scalable Shared-Memory Multiprocessors . In Languages, Compilers, and Run-Time Systems for Scalable Computers , pages 85 -- 99 , 2000 . D. S. Nikolopoulos, T. S. Papatheodorou, C. D. Polychronopoulos, J. Labarta, and E. Ayguad\u00e9. UPMLIB: A Runtime System for Tuning the Memory Performance of OpenMP Programs on Scalable Shared-Memory Multiprocessors. In Languages, Compilers, and Run-Time Systems for Scalable Computers, pages 85--99, 2000."},{"key":"e_1_3_2_1_14_1","first-page":"95","volume-title":"User-Level Dynamic Page Migration for Multiprogrammed Shared-Memory Multiprocessors. In International Conference on Parallel Programming","author":"Nikolopoulos D. S.","year":"2000","unstructured":"D. S. Nikolopoulos , T. S. Papatheodorou , C. D. Polychronopoulos , J. Labarta , and E. Ayguad\u00e9 . User-Level Dynamic Page Migration for Multiprogrammed Shared-Memory Multiprocessors. In International Conference on Parallel Programming , pages 95 -- 104 , August 2000 . D. S. Nikolopoulos, T. S. Papatheodorou, C. D. Polychronopoulos, J. Labarta, and E. Ayguad\u00e9. User-Level Dynamic Page Migration for Multiprogrammed Shared-Memory Multiprocessors. In International Conference on Parallel Programming, pages 95--104, August 2000."},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/331532.331570"},{"key":"e_1_3_2_1_16_1","volume-title":"Automatic Page Migration for Linux {A Matter of Hygiene}. In linux.conf.au","author":"Schermerhorn L. T.","year":"2007","unstructured":"L. T. Schermerhorn . Automatic Page Migration for Linux {A Matter of Hygiene}. In linux.conf.au 2007 , 2007. L. T. Schermerhorn. Automatic Page Migration for Linux {A Matter of Hygiene}. In linux.conf.au 2007, 2007."},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/CLUSTER.2010.38"},{"key":"e_1_3_2_1_18_1","volume-title":"Modern Operating Systems","author":"Tanenbaum A. S.","year":"2007","unstructured":"A. S. Tanenbaum . Modern Operating Systems . Prentice Hall International , 2007 . A. S. Tanenbaum. Modern Operating Systems. Prentice Hall International, 2007."},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/1366219.1366222"}],"event":{"name":"ICS'12: International Conference on Supercomputing","sponsor":["SIGARCH ACM Special Interest Group on Computer Architecture","SIGHPC ACM Special Interest Group on High Performance Computing, Special Interest Group on High Performance Computing"],"location":"Venice Italy","acronym":"ICS'12"},"container-title":["Proceedings of the 2nd International Workshop on Runtime and Operating Systems for Supercomputers"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2318916.2318929","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2318916.2318929","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T09:20:56Z","timestamp":1750238456000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2318916.2318929"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,6,29]]},"references-count":19,"alternative-id":["10.1145\/2318916.2318929","10.1145\/2318916"],"URL":"https:\/\/doi.org\/10.1145\/2318916.2318929","relation":{},"subject":[],"published":{"date-parts":[[2012,6,29]]},"assertion":[{"value":"2012-06-29","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}