{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:24:11Z","timestamp":1750307051726,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":10,"publisher":"ACM","license":[{"start":{"date-parts":[[2012,7,30]],"date-time":"2012-07-30T00:00:00Z","timestamp":1343606400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2012,7,30]]},"DOI":"10.1145\/2333660.2333701","type":"proceedings-article","created":{"date-parts":[[2012,7,31]],"date-time":"2012-07-31T13:43:14Z","timestamp":1343742194000},"page":"155-160","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["A low-leakage dynamic register file with unclocked wordline and sub-segmentation for improved bitline scalability"],"prefix":"10.1145","author":[{"given":"Eric","family":"Donkoh","sequence":"first","affiliation":[{"name":"Intel Corporation, Hillsboro, OR, USA"}]},{"given":"Patrick","family":"Chiang","sequence":"additional","affiliation":[{"name":"Oregon State University, Corvallis, OR, USA"}]}],"member":"320","published-online":{"date-parts":[[2012,7,30]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2010.5434033"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/2333660.2333700"},{"key":"e_1_3_2_1_3_1","first-page":"1","volume-title":"IEDM","author":"P.","year":"2009"},{"first-page":"320","volume-title":"2002 Symp. VLSI Circuits","author":"S.","key":"e_1_3_2_1_4_1"},{"key":"e_1_3_2_1_5_1","first-page":"241","volume-title":"Proc. SOC Conference","author":"Agarwal A.","year":"2004"},{"volume-title":"Of Solid-Srate Circ.","year":"2002","author":"A.","key":"e_1_3_2_1_6_1"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"crossref","unstructured":"R Krishnamurthy et. al. \"A 130-nm 6Ghz 256x32bit leakage tolerant register file \" In IEEE JSSC. 2002.  R Krishnamurthy et. al. \"A 130-nm 6Ghz 256x32bit leakage tolerant register file \" In IEEE JSSC. 2002.","DOI":"10.1109\/4.997856"},{"key":"e_1_3_2_1_8_1","first-page":"421","volume-title":"Dig.","author":"Borkar S.","year":"2004"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/383082.383132"},{"first-page":"58","volume-title":"Papers","author":"Kumar R.","key":"e_1_3_2_1_10_1"}],"event":{"name":"ISLPED'12: International Symposium on Low Power Electronics and Design","sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEEE CAS"],"location":"Redondo Beach California USA","acronym":"ISLPED'12"},"container-title":["Proceedings of the 2012 ACM\/IEEE international symposium on Low power electronics and design"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2333660.2333701","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2333660.2333701","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T09:21:06Z","timestamp":1750238466000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2333660.2333701"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,7,30]]},"references-count":10,"alternative-id":["10.1145\/2333660.2333701","10.1145\/2333660"],"URL":"https:\/\/doi.org\/10.1145\/2333660.2333701","relation":{},"subject":[],"published":{"date-parts":[[2012,7,30]]},"assertion":[{"value":"2012-07-30","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}