{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,17]],"date-time":"2026-07-17T03:07:54Z","timestamp":1784257674848,"version":"3.55.0"},"reference-count":38,"publisher":"Association for Computing Machinery (ACM)","issue":"3","license":[{"start":{"date-parts":[[2012,9,1]],"date-time":"2012-09-01T00:00:00Z","timestamp":1346457600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["3.25E+12"],"award-info":[{"award-number":["3.25E+12"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100013285","name":"Program for Professor of Special Appointment (Eastern Scholar) at Shanghai Institutions of Higher Learning","doi-asserted-by":"crossref","award":["2008033"],"award-info":[{"award-number":["2008033"]}],"id":[{"id":"10.13039\/501100013285","id-type":"DOI","asserted-by":"crossref"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Embed. Comput. Syst."],"published-print":{"date-parts":[[2012,9]]},"abstract":"<jats:p>This article proposes a novel approach to cryptosystem design to prevent power analysis attacks. Such attacks infer program behavior by continuously monitoring the power supply current going into the processor core. They form an important class of security attacks. Our approach is based on dynamic voltage and frequency scaling (DVFS), which hides processor state to make it harder for an attacker to gain access to a secure system. Three designs are studied to test the efficacy of the DVFS method against power analysis attacks. The advanced realization of our cryptosystem is presented which achieves enough high power and time trace entropies to block various kinds of power analysis attacks in the DES algorithm. We observed 27% energy reduction and 16% time overhead in these algorithms. Finally, DVFS hardness analysis is presented.<\/jats:p>","DOI":"10.1145\/2345770.2345774","type":"journal-article","created":{"date-parts":[[2012,10,2]],"date-time":"2012-10-02T13:50:00Z","timestamp":1349185800000},"page":"1-16","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":6,"title":["Power Analysis Attack Resistance Engineering by Dynamic Voltage and Frequency Scaling"],"prefix":"10.1145","volume":"11","author":[{"given":"Shengqi","family":"Yang","sequence":"first","affiliation":[{"name":"Shanghai University"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Pallav","family":"Gupta","sequence":"additional","affiliation":[{"name":"Villanova University"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Marilyn","family":"Wolf","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Dimitrios","family":"Serpanos","sequence":"additional","affiliation":[{"name":"University of Patras and ISI\/R. C. Athena"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Vijaykrishnan","family":"Narayanan","sequence":"additional","affiliation":[{"name":"Pennsylvania State University"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yuan","family":"Xie","sequence":"additional","affiliation":[{"name":"Pennsylvania State University"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2012,9]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/871506.871517"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/775832.775845"},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1007\/s001450010016"},{"key":"e_1_2_1_4_1","first-page":"1571","article-title":"A dynamic voltage scaled microprocessor system","volume":"35","author":"Burd T.","year":"2000","unstructured":"Burd , T. , Pering , T. , Stratakos , A. , and Brodersen , R. 2000 . A dynamic voltage scaled microprocessor system . IEEE Trans. Syst. Sci. Cybern. 35 , 11, 1571 -- 1580 . Burd, T., Pering, T., Stratakos, A., and Brodersen, R. 2000. A dynamic voltage scaled microprocessor system. IEEE Trans. Syst. Sci. Cybern. 35, 11, 1571--1580.","journal-title":"IEEE Trans. Syst. Sci. Cybern."},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/344166.344181"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/4.881202"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2004.13"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996718"},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.5555\/648252.752381"},{"key":"e_1_2_1_10_1","volume-title":"Proceedings of the Workshop on Complexity-Effective Design.","author":"Ghiasi S.","unstructured":"Ghiasi , S. , Casmira , J. , and Grunwald , D . 2000. Using IPC variation in workload with externally specified rates to reduce power consumption . In Proceedings of the Workshop on Complexity-Effective Design. Ghiasi, S., Casmira, J., and Grunwald, D. 2000. Using IPC variation in workload with externally specified rates to reduce power consumption. In Proceedings of the Workshop on Complexity-Effective Design."},{"key":"e_1_2_1_11_1","volume-title":"Proceedings of the International Conference on Electronics, Circuits and Systems. 364--367","author":"Giancane L.","unstructured":"Giancane , L. , Marietti , P. , Olivieri , M. , Scotti , G. , and Trifiletti , A . 2008. A new dynamic differential logic style as a countermeasure to power analysis attacks . In Proceedings of the International Conference on Electronics, Circuits and Systems. 364--367 . Giancane, L., Marietti, P., Olivieri, M., Scotti, G., and Trifiletti, A. 2008. A new dynamic differential logic style as a countermeasure to power analysis attacks. In Proceedings of the International Conference on Electronics, Circuits and Systems. 364--367."},{"key":"e_1_2_1_12_1","volume-title":"Proceedings of the International Workshop on Cryptographic Hardware & Embedded Systems. 158--172","author":"Goubin L.","unstructured":"Goubin , L. and Patarin , J . 1999. DES and differential power analysis - the duplication method . In Proceedings of the International Workshop on Cryptographic Hardware & Embedded Systems. 158--172 . Goubin, L. and Patarin, J. 1999. DES and differential power analysis - the duplication method. In Proceedings of the International Workshop on Cryptographic Hardware & Embedded Systems. 158--172."},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2008.109"},{"key":"e_1_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/ITNG.2007.89"},{"key":"e_1_2_1_15_1","volume-title":"Proceedings of the Conference on Advances in Cryptology. 104--113","author":"Kocher P.","year":"1996","unstructured":"Kocher , P. 1996 . Timing attacks on implementations of Diffe-Hellman, RSA, DSS and other systems . In Proceedings of the Conference on Advances in Cryptology. 104--113 . Kocher, P. 1996. Timing attacks on implementations of Diffe-Hellman, RSA, DSS and other systems. In Proceedings of the Conference on Advances in Cryptology. 104--113."},{"key":"e_1_2_1_16_1","volume-title":"Proceedings of the Conference on Advances in Cryptology. 388--397","author":"Kocher P.","unstructured":"Kocher , P. , Jaffe , J. , and Jun , B . 1999. Differential power analysis . In Proceedings of the Conference on Advances in Cryptology. 388--397 . Kocher, P., Jaffe, J., and Jun, B. 1999. Differential power analysis. In Proceedings of the Conference on Advances in Cryptology. 388--397."},{"key":"e_1_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996771"},{"key":"e_1_2_1_18_1","volume-title":"Proceedings of the USENIX Workshop on Smartcard Technology. 1--12","author":"K\u00f6mmerling O.","unstructured":"K\u00f6mmerling , O. and Kuhn , M. G . 1999. Design principles for tamper-resistant smartcard processors . In Proceedings of the USENIX Workshop on Smartcard Technology. 1--12 . K\u00f6mmerling, O. and Kuhn, M. G. 1999. Design principles for tamper-resistant smartcard processors. In Proceedings of the USENIX Workshop on Smartcard Technology. 1--12."},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2004.52"},{"key":"e_1_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2004.35"},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.893660"},{"key":"e_1_2_1_22_1","volume-title":"Proceedings of the International Symposium on Asynchronous Circuits & Systems. 211--218","author":"Moore S.","unstructured":"Moore , S. , Anderson , R. , Cunningham , P. , Mullins , R. , and Taylor , G . 2002. Improving smart card security using self-timed circuits . In Proceedings of the International Symposium on Asynchronous Circuits & Systems. 211--218 . Moore, S., Anderson, R., Cunningham, P., Mullins, R., and Taylor, G. 2002. Improving smart card security using self-timed circuits. In Proceedings of the International Symposium on Asynchronous Circuits & Systems. 211--218."},{"key":"e_1_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1145\/339647.339659"},{"key":"e_1_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.803941"},{"key":"e_1_2_1_25_1","volume-title":"Proceedings of the Conference on Research in Smart Cards. 200--210","author":"Quisquater J. J.","unstructured":"Quisquater , J. J. and Samyde , D . 2001. Electromagnetic analysis (EMA): Measures and counter-measures for smart cards . In Proceedings of the Conference on Research in Smart Cards. 200--210 . Quisquater, J. J. and Samyde, D. 2001. Electromagnetic analysis (EMA): Measures and counter-measures for smart cards. In Proceedings of the Conference on Research in Smart Cards. 200--210."},{"key":"e_1_2_1_26_1","volume-title":"Proceedings of Securit\u00e9 de la Communication sur Internet (SECI\u201902)","author":"Quisquater J. J.","unstructured":"Quisquater , J. J. and Samyde , D . 2002. Side-channel cryptanalysis . In Proceedings of Securit\u00e9 de la Communication sur Internet (SECI\u201902) . 179--184. Quisquater, J. J. and Samyde, D. 2002. Side-channel cryptanalysis. In Proceedings of Securit\u00e9 de la Communication sur Internet (SECI\u201902). 179--184."},{"key":"e_1_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1109\/TDSC.2004.25"},{"key":"e_1_2_1_28_1","volume-title":"Proceedings of the 16th International Conference on VLSI Design. 269--270","author":"Ravi S.","unstructured":"Ravi , S. , Raghunathan , A. , and Chakradhar , S . 2003. Embedding security in wireless embedded systems . In Proceedings of the 16th International Conference on VLSI Design. 269--270 . Ravi, S., Raghunathan, A., and Chakradhar, S. 2003. Embedding security in wireless embedded systems. In Proceedings of the 16th International Conference on VLSI Design. 269--270."},{"key":"e_1_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/1403375.1403684"},{"key":"e_1_2_1_30_1","volume-title":"Proceedings of the International Symposium on Defect & Fault Tolerance in VLSI Systems. 508--516","author":"Regazzoni F.","unstructured":"Regazzoni , F. , Eisenbarth , T. , Grobschadl , J. , Breveglieri , L. , Ienne , P. , Koren , I. , and Paar , C . 2007. Power attacks resistance of cryptographic S-boxes with added error detection circuits . In Proceedings of the International Symposium on Defect & Fault Tolerance in VLSI Systems. 508--516 . Regazzoni, F., Eisenbarth, T., Grobschadl, J., Breveglieri, L., Ienne, P., Koren, I., and Paar, C. 2007. Power attacks resistance of cryptographic S-boxes with added error detection circuits. In Proceedings of the International Symposium on Defect & Fault Tolerance in VLSI Systems. 508--516."},{"key":"e_1_2_1_31_1","volume-title":"Protecting FPGAs from power analysis. Tech. rep","author":"Rohatgi P.","unstructured":"Rohatgi , P. 2010. Protecting FPGAs from power analysis. Tech. rep ., Cryptography Research Inc . Rohatgi, P. 2010. Protecting FPGAs from power analysis. Tech. rep., Cryptography Research Inc."},{"key":"e_1_2_1_32_1","volume-title":"IEE Proc. Comput. Digital Techn. 84--89","author":"Saputra H.","unstructured":"Saputra , H. , Narayanan , V. , Kandemir , M. , Irwin , M. J. , Brooks , R. , and Zhang , S. K. W. 2003. Masking the energy behavior of DES encryption . IEE Proc. Comput. Digital Techn. 84--89 . Saputra, H., Narayanan, V., Kandemir, M., Irwin, M. J., Brooks, R., and Zhang, S. K. W. 2003. Masking the energy behavior of DES encryption. IEE Proc. Comput. Digital Techn. 84--89."},{"key":"e_1_2_1_33_1","volume-title":"Protocols, Algorithms, and Source Code in C","author":"Schneier B.","unstructured":"Schneier , B. 1996. Applied Cryptography , Protocols, Algorithms, and Source Code in C . John Wiley , New York, NY . Schneier, B. 1996. Applied Cryptography, Protocols, Algorithms, and Source Code in C. John Wiley, New York, NY."},{"key":"e_1_2_1_34_1","volume-title":"Proceedings of the 16th International Conference on VLSI Design. 271--276","author":"Sen S.","unstructured":"Sen , S. , Hossain , S. I. , Islam , K. , Chowdhuri , D. R. , and Chaudhuri , P. P . 2003. Cryptosystem designed for embedded system security . In Proceedings of the 16th International Conference on VLSI Design. 271--276 . Sen, S., Hossain, S. I., Islam, K., Chowdhuri, D. R., and Chaudhuri, P. P. 2003. Cryptosystem designed for embedded system security. In Proceedings of the 16th International Conference on VLSI Design. 271--276."},{"key":"e_1_2_1_35_1","volume-title":"Proceedings of the International Workshop on Cryptographic Hardware and Embedded Systems. 125--136","author":"Tiri K.","unstructured":"Tiri , K. and Verbauwhede , I . 2003. Securing encryption algorithms against DPA at the logic level: next generation smart card technology . In Proceedings of the International Workshop on Cryptographic Hardware and Embedded Systems. 125--136 . Tiri, K. and Verbauwhede, I. 2003. Securing encryption algorithms against DPA at the logic level: next generation smart card technology. In Proceedings of the International Workshop on Cryptographic Hardware and Embedded Systems. 125--136."},{"key":"e_1_2_1_36_1","volume-title":"Proceedings of the International Workshop on Cryptographic Hardware & Embedded Systems. 1--15","author":"Wagner D.","unstructured":"Wagner , D. and Waddle , J . 2004. Towards efficient second-order power analysis . In Proceedings of the International Workshop on Cryptographic Hardware & Embedded Systems. 1--15 . Wagner, D. and Waddle, J. 2004. Towards efficient second-order power analysis. In Proceedings of the International Workshop on Cryptographic Hardware & Embedded Systems. 1--15."},{"key":"e_1_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.925778"},{"key":"e_1_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996798"}],"container-title":["ACM Transactions on Embedded Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2345770.2345774","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2345770.2345774","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T09:21:11Z","timestamp":1750238471000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2345770.2345774"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,9]]},"references-count":38,"journal-issue":{"issue":"3","published-print":{"date-parts":[[2012,9]]}},"alternative-id":["10.1145\/2345770.2345774"],"URL":"https:\/\/doi.org\/10.1145\/2345770.2345774","relation":{},"ISSN":["1539-9087","1558-3465"],"issn-type":[{"value":"1539-9087","type":"print"},{"value":"1558-3465","type":"electronic"}],"subject":[],"published":{"date-parts":[[2012,9]]},"assertion":[{"value":"2009-06-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2010-07-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2012-09-01","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}