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Because tasks may have to be mapped to target processors with different instruction set architectures, we propose the use of Low Level Virtual Machine (LLVM) to postcompile the tasks at runtime depending on their target processor. A novel dynamic mapping heuristic is also proposed, aiming to exploit the advantages of specialized processors while taking into account the overheads imposed by virtualization. Extensive experimental work at different levels of abstraction---FPGA prototype, RTL and system-level simulation---is presented to evaluate the proposed techniques.<\/jats:p>","DOI":"10.1145\/2362374.2362381","type":"journal-article","created":{"date-parts":[[2012,10,18]],"date-time":"2012-10-18T13:23:19Z","timestamp":1350566599000},"page":"1-11","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":3,"title":["Enabling Adaptive Techniques in Heterogeneous MPSoCs Based on Virtualization"],"prefix":"10.1145","volume":"5","author":[{"given":"Luciano","family":"Ost","sequence":"first","affiliation":[{"name":"University of Montpellier II\/LIRMM"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sameer","family":"Varyani","sequence":"additional","affiliation":[{"name":"University of Montpellier II\/LIRMM"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Leandro Soares","family":"Indrusiak","sequence":"additional","affiliation":[{"name":"University of York"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Marcelo","family":"Mandelli","sequence":"additional","affiliation":[{"name":"Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Gabriel Marchesan","family":"Almeida","sequence":"additional","affiliation":[{"name":"Karlsruhe Institute of Technology"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Eduardo","family":"Wachter","sequence":"additional","affiliation":[{"name":"Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Fernando","family":"Moraes","sequence":"additional","affiliation":[{"name":"Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Gilles","family":"Sassatelli","sequence":"additional","affiliation":[{"name":"University of Montpellier"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2012,10]]},"reference":[{"volume-title":"Proceedings of the International Symposium on Microarchitecture (MICRO\u201903)","author":"Adve V.","key":"e_1_2_1_1_1"},{"volume-title":"Proceedings of the IEEE International Symposium on Rapid System Prototyping (RSP\u201911)","author":"Aguiar A. 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