{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:24:25Z","timestamp":1750307065276,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":10,"publisher":"ACM","license":[{"start":{"date-parts":[[2012,10,7]],"date-time":"2012-10-07T00:00:00Z","timestamp":1349568000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2012,10,7]]},"DOI":"10.1145\/2380445.2380477","type":"proceedings-article","created":{"date-parts":[[2012,10,9]],"date-time":"2012-10-09T12:20:46Z","timestamp":1349785246000},"page":"181-186","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":8,"title":["Non-intrusive trace &amp; debug noc architecture with accurate timestamping for GALS SoCs"],"prefix":"10.1145","author":[{"given":"Vladimir","family":"Todorov","sequence":"first","affiliation":[{"name":"Intel Mobile Communications GmbH, Munich, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alberto","family":"Ghiribaldi","sequence":"additional","affiliation":[{"name":"University of Ferrara, Ferrara, Italy"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Helmut","family":"Reinig","sequence":"additional","affiliation":[{"name":"Intel Mobile Communications GmbH, Munich, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Davide","family":"Bertozzi","sequence":"additional","affiliation":[{"name":"University of Ferrara, Ferrara, Italy"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ulf","family":"Schlichtmann","sequence":"additional","affiliation":[{"name":"Technische Universitaet Muenchen, Munich, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2012,10,7]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2011.42"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2039811"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1145\/1278480.1278604"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/MTV.2006.7"},{"key":"e_1_3_2_1_5_1","volume-title":"Alan Su. A Low-Cost SOC Debug Platform Based on On-Chip Test Architectures. In IEEE International SOC Conference","author":"Lee Kuen-Jong","year":"2009","unstructured":"Kuen-Jong Lee , Si-Yuan Liang , and Alan Su. A Low-Cost SOC Debug Platform Based on On-Chip Test Architectures. In IEEE International SOC Conference , 2009 . Kuen-Jong Lee, Si-Yuan Liang, and Alan Su. A Low-Cost SOC Debug Platform Based on On-Chip Test Architectures. In IEEE International SOC Conference, 2009."},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2008.15"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2007.46"},{"key":"e_1_3_2_1_8_1","volume-title":"DATE","author":"Gao Jianliang","year":"2012","unstructured":"Jianliang Gao , Jianxin Wang , Yinhe Han , Lei Zhang , and Xiaowei Li . A Clustering-Based Scheme for Concurrent Trace in Debugging NoC-Based Multicore Systems . In DATE , March 2012 . Jianliang Gao, Jianxin Wang, Yinhe Han, Lei Zhang, and Xiaowei Li. A Clustering-Based Scheme for Concurrent Trace in Debugging NoC-Based Multicore Systems. In DATE, March 2012."},{"key":"e_1_3_2_1_9_1","volume-title":"DATE","author":"Tang Shan","year":"2007","unstructured":"Shan Tang and Qiang Xu . A Multi-Core Debug Platform for NoC-Based Systems . In DATE , 2007 . Shan Tang and Qiang Xu. A Multi-Core Debug Platform for NoC-Based Systems. In DATE, 2007."},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/VLSISoC.2011.6081597"}],"event":{"name":"ESWEEK'12: Eighth Embedded System Week","sponsor":["CEDA","SIGBED ACM Special Interest Group on Embedded Systems","SIGDA ACM Special Interest Group on Design Automation","IEEE CAS","SIGMICRO ACM Special Interest Group on Microarchitectural Research and Processing","IEEE CS"],"location":"Tampere Finland","acronym":"ESWEEK'12"},"container-title":["Proceedings of the eighth IEEE\/ACM\/IFIP international conference on Hardware\/software codesign and system synthesis"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2380445.2380477","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2380445.2380477","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T09:21:21Z","timestamp":1750238481000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2380445.2380477"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,10,7]]},"references-count":10,"alternative-id":["10.1145\/2380445.2380477","10.1145\/2380445"],"URL":"https:\/\/doi.org\/10.1145\/2380445.2380477","relation":{},"subject":[],"published":{"date-parts":[[2012,10,7]]},"assertion":[{"value":"2012-10-07","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}