{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:24:26Z","timestamp":1750307066537,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":21,"publisher":"ACM","license":[{"start":{"date-parts":[[2012,10,7]],"date-time":"2012-10-07T00:00:00Z","timestamp":1349568000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2012,10,7]]},"DOI":"10.1145\/2380445.2380529","type":"proceedings-article","created":{"date-parts":[[2012,10,9]],"date-time":"2012-10-09T12:20:46Z","timestamp":1349785246000},"page":"547-556","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":12,"title":["From RTL IP to functional system-level models with extra-functional properties"],"prefix":"10.1145","author":[{"given":"Daniel","family":"Lorenz","sequence":"first","affiliation":[{"name":"OFFIS Institute for Information Technology, Oldenburg, Germany"}]},{"given":"Kim","family":"Gr\u00fcttner","sequence":"additional","affiliation":[{"name":"OFFIS Institute for Information Technology, Oldenburg, Germany"}]},{"given":"Nicola","family":"Bombieri","sequence":"additional","affiliation":[{"name":"University of Verona, Verona, Italy"}]},{"given":"Valerio","family":"Guarnieri","sequence":"additional","affiliation":[{"name":"University of Verona, Verona, Italy"}]},{"given":"Sara","family":"Bocchio","sequence":"additional","affiliation":[{"name":"STMicroelectronics, Agrate Brianza, Italy"}]}],"member":"320","published-online":{"date-parts":[[2012,10,7]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"Accellera Systems Initiative. SystemC. http:\/\/www.accellera.org.  Accellera Systems Initiative. SystemC. http:\/\/www.accellera.org."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/280756.280881"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2010.187"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/944645.944651"},{"key":"e_1_3_2_1_5_1","unstructured":"Carbon Model Studio. http:\/\/carbondesignsystems.com\/.  Carbon Model Studio. http:\/\/carbondesignsystems.com\/."},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/225871.225880"},{"key":"e_1_3_2_1_7_1","unstructured":"COMPLEX (ICT FP7 247999). COdesign and power Management in PLatform-based design space EXploration. http:\/\/complex.offis.de.  COMPLEX (ICT FP7 247999). COdesign and power Management in PLatform-based design space EXploration. http:\/\/complex.offis.de."},{"key":"e_1_3_2_1_8_1","unstructured":"DVM. http:\/\/aldec.com.  DVM. http:\/\/aldec.com."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.5555\/1266366.1266530"},{"key":"e_1_3_2_1_10_1","unstructured":"FreeHDL-V2CC. http:\/\/linux.die.net\/man\/1\/freehdl-v2cc.  FreeHDL-V2CC. http:\/\/linux.die.net\/man\/1\/freehdl-v2cc."},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-94-007-0638-5_20"},{"key":"e_1_3_2_1_12_1","volume-title":"Proceedings of the Forum on specification and Design Languages (FDL'2012)","author":"G\u00f6rgen R.","year":"2012","unstructured":"R. G\u00f6rgen , J.-H. Oetjens , and W. Nebel . Transformation of Event-Driven HDL Blocks for Native Integration into Time-Driven System Models . In Proceedings of the Forum on specification and Design Languages (FDL'2012) , Sept. 2012 . R. G\u00f6rgen, J.-H. Oetjens, and W. Nebel. Transformation of Event-Driven HDL Blocks for Native Integration into Time-Driven System Models. In Proceedings of the Forum on specification and Design Languages (FDL'2012), Sept. 2012."},{"key":"e_1_3_2_1_13_1","unstructured":"HIFSuite. http:\/\/hifsuite.edalab.it.  HIFSuite. http:\/\/hifsuite.edalab.it."},{"key":"e_1_3_2_1_14_1","first-page":"978","author":"IEEE Computer Society","year":"2011","unstructured":"IEEE Computer Society . IEEE Standard SystemC Language Reference Manual. IEEE Std 1666-- 2011 , Sept. 2011. ISBN 978 - 970 --7381--6802--9. IEEE Computer Society. IEEE Standard SystemC Language Reference Manual. IEEE Std 1666--2011, Sept. 2011. ISBN 978-0--7381--6802--9.","journal-title":"IEEE Standard SystemC Language Reference Manual. IEEE Std 1666--"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2008.71"},{"key":"e_1_3_2_1_16_1","series-title":"Lecture Notes in Computer Science","volume-title":"Power And Timing Modeling, Optimization and Simulation - 22nd International Workshop (PATMOS'2012)","author":"Lorenz D.","year":"2012","unstructured":"D. Lorenz , P. A. Hartmann , K. Gr\u00fcttner , and W. Nebel . Non-invasive Simulation of Power Consumption with SystemC . In Power And Timing Modeling, Optimization and Simulation - 22nd International Workshop (PATMOS'2012) , Lecture Notes in Computer Science . Springer , Sept. 2012 . D. Lorenz, P. A. Hartmann, K. Gr\u00fcttner, and W. Nebel. Non-invasive Simulation of Power Consumption with SystemC. In Power And Timing Modeling, Optimization and Simulation - 22nd International Workshop (PATMOS'2012), Lecture Notes in Computer Science. Springer, Sept. 2012."},{"key":"e_1_3_2_1_17_1","unstructured":"W. Snyder P. Wasson and D. Galbi. Verilator -Convert Verilog code to C++\/SystemC. http:\/\/www.veripool.org\/wiki\/verilator.  W. Snyder P. Wasson and D. Galbi. Verilator -Convert Verilog code to C++\/SystemC. http:\/\/www.veripool.org\/wiki\/verilator."},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1049\/ess:20030104"},{"key":"e_1_3_2_1_19_1","volume-title":"Oldenburg","author":"Streub\u00fchr M.","year":"2011","unstructured":"M. Streub\u00fchr , R. Rosales , R. Hasholzner , C. Haubelt , and J. Teich . ESL Power and Performance Estimation for Heterogeneous MPSoCs Using SystemC. In Forum on specification and Design Languages (FDL'2011) , Oldenburg , Germany , Sept. 2011 . M. Streub\u00fchr, R. Rosales, R. Hasholzner, C. Haubelt, and J. Teich. ESL Power and Performance Estimation for Heterogeneous MPSoCs Using SystemC. In Forum on specification and Design Languages (FDL'2011), Oldenburg, Germany, Sept. 2011."},{"key":"e_1_3_2_1_20_1","unstructured":"VHDLC. http:\/\/ostatic.com.  VHDLC. http:\/\/ostatic.com."},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1629959"}],"event":{"name":"ESWEEK'12: Eighth Embedded System Week","sponsor":["CEDA","SIGBED ACM Special Interest Group on Embedded Systems","SIGDA ACM Special Interest Group on Design Automation","IEEE CAS","SIGMICRO ACM Special Interest Group on Microarchitectural Research and Processing","IEEE CS"],"location":"Tampere Finland","acronym":"ESWEEK'12"},"container-title":["Proceedings of the eighth IEEE\/ACM\/IFIP international conference on Hardware\/software codesign and system synthesis"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2380445.2380529","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2380445.2380529","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T09:21:22Z","timestamp":1750238482000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2380445.2380529"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,10,7]]},"references-count":21,"alternative-id":["10.1145\/2380445.2380529","10.1145\/2380445"],"URL":"https:\/\/doi.org\/10.1145\/2380445.2380529","relation":{},"subject":[],"published":{"date-parts":[[2012,10,7]]},"assertion":[{"value":"2012-10-07","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}