{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:21:32Z","timestamp":1750306892283,"version":"3.41.0"},"reference-count":38,"publisher":"Association for Computing Machinery (ACM)","issue":"1s","license":[{"start":{"date-parts":[[2013,3,1]],"date-time":"2013-03-01T00:00:00Z","timestamp":1362096000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100001868","name":"National Science Council Taiwan","doi-asserted-by":"publisher","award":["NSC99-2221-E007-112-MY3"],"award-info":[{"award-number":["NSC99-2221-E007-112-MY3"]}],"id":[{"id":"10.13039\/501100001868","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Embed. Comput. Syst."],"published-print":{"date-parts":[[2013,3]]},"abstract":"<jats:p>As multi-core architecture has become the mainstream, the corresponding multi-core instruction-set simulation (MCISS) is also needed to aid system development. Ideally, we may run a MCISS in parallel to enhance the simulation speed. However, the conventional centralized timing synchronization mechanism would greatly constrain the parallelism of a MCISS, so the simulation speed is bounded. To resolve this issue, we propose a new distributed timing synchronization technique which allows higher parallelism for a MCISS. Hence, it accelerates the simulation speed by 9 to 20 times as the number of cores increases in contrast to the centralized synchronization approach.<\/jats:p>","DOI":"10.1145\/2435227.2435250","type":"journal-article","created":{"date-parts":[[2018,1,4]],"date-time":"2018-01-04T16:27:31Z","timestamp":1515083251000},"page":"1-24","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":4,"title":["A distributed timing synchronization technique for parallel multi-core instruction-set simulation"],"prefix":"10.1145","volume":"12","author":[{"given":"Meng-Huan","family":"Wu","sequence":"first","affiliation":[{"name":"National Tsing Hua University, Taiwan"}]},{"given":"Cheng-Yang","family":"Fu","sequence":"additional","affiliation":[{"name":"National Tsing Hua University, Taiwan"}]},{"given":"Peng-Chih","family":"Wang","sequence":"additional","affiliation":[{"name":"National Tsing Hua University, Taiwan"}]},{"given":"Ren-Song","family":"Tsay","sequence":"additional","affiliation":[{"name":"National Tsing Hua University, Taiwan"}]}],"member":"320","published-online":{"date-parts":[[2013,3,29]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/2.546611"},{"key":"e_1_2_1_2_1","unstructured":"Andes Technology Corp. 2008. AndeStarTM instruction set architecture manual\/Andes programming guide. http:\/\/www.andestech.com\/p4-5.htm.  Andes Technology Corp. 2008. AndeStarTM instruction set architecture manual\/Andes programming guide. http:\/\/www.andestech.com\/p4-5.htm."},{"key":"e_1_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.5555\/1247360.1247401"},{"key":"e_1_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2004.836734"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/268806.268810"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2004.7"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICPP.2009.50"},{"key":"e_1_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/183018.183032"},{"key":"e_1_2_1_9_1","unstructured":"Engblom J. 2009. Virtutech white paper: SIMICS accelerator. http:\/\/www.virtutech.com\/whitepapers\/accelerator.html.  Engblom J. 2009. Virtutech white paper: SIMICS accelerator. http:\/\/www.virtutech.com\/whitepapers\/accelerator.html."},{"key":"e_1_2_1_10_1","volume-title":"Proceedings of the Winter Simulation Conference. 147--157","author":"Fujimoto R.","year":"2001","unstructured":"Fujimoto , R. 2001 . Parallel simulation: parallel and distributed simulation systems . In Proceedings of the Winter Simulation Conference. 147--157 . Fujimoto, R. 2001. Parallel simulation: parallel and distributed simulation systems. In Proceedings of the Winter Simulation Conference. 147--157."},{"key":"e_1_2_1_11_1","unstructured":"Gr\u00f6tker T. Liao S. Martin G. and Swan S. 2002. System Design with SystemC. Kluwer Academic Publishers.   Gr\u00f6tker T. Liao S. Martin G. and Swan S. 2002. System Design with SystemC. Kluwer Academic Publishers."},{"key":"e_1_2_1_12_1","volume-title":"Computer Architecture: A Quantitative Approach","author":"Hennessy J.","year":"2007","unstructured":"Hennessy , J. and Patterson , D . 2007 . Computer Architecture: A Quantitative Approach 4 th Ed. Morgan Kaufmann Publishers . Hennessy, J. and Patterson, D. 2007. Computer Architecture: A Quantitative Approach 4th Ed. Morgan Kaufmann Publishers.","edition":"4"},{"key":"e_1_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/3916.3988"},{"key":"e_1_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.5555\/367072.367945"},{"key":"e_1_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/1065579.1065669"},{"key":"e_1_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/359545.359563"},{"key":"e_1_2_1_17_1","unstructured":"Levine J. 1999. Linkers and Loaders. Morgan Kaufmann.   Levine J. 1999. Linkers and Loaders. Morgan Kaufmann."},{"volume-title":"Proceedings of the 15th Asia and South Pacific Design Automation Conference. 235--240","author":"Lin K.","key":"e_1_2_1_18_1","unstructured":"Lin , K. , Lo , C. , and Tsay , R . 2010. Source-level timing annotation for fast and accurate TLM computation model generation . In Proceedings of the 15th Asia and South Pacific Design Automation Conference. 235--240 . Lin, K., Lo, C., and Tsay, R. 2010. Source-level timing annotation for fast and accurate TLM computation model generation. In Proceedings of the 15th Asia and South Pacific Design Automation Conference. 235--240."},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/2.982916"},{"key":"e_1_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/6462.6485"},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/4434.895100"},{"key":"e_1_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/151261.151266"},{"key":"e_1_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1145\/513918.513927"},{"key":"e_1_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/1176254.1176302"},{"key":"e_1_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1145\/1151074.1151083"},{"key":"e_1_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1145\/775832.776026"},{"key":"e_1_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1109\/5.21073"},{"key":"e_1_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.106"},{"key":"e_1_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/1391469.1391543"},{"key":"e_1_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.5555\/1899721.1899754"},{"key":"e_1_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1145\/151220.151227"},{"key":"e_1_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1145\/233013.233025"},{"key":"e_1_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1145\/223982.223990"},{"key":"e_1_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1145\/1629335.1629362"},{"volume-title":"Proceedings of the Conference on Design, Automation and Test in Europe. 1177--1182","author":"Wu M.","key":"e_1_2_1_35_1","unstructured":"Wu , M. , Lee , W. , Chuang , C. , and Tsay , R . 2010. Automatic generation of software TLM in multiple abstraction layers for efficient HW\/SW co-simulation . In Proceedings of the Conference on Design, Automation and Test in Europe. 1177--1182 . Wu, M., Lee, W., Chuang, C., and Tsay, R. 2010. Automatic generation of software TLM in multiple abstraction layers for efficient HW\/SW co-simulation. In Proceedings of the Conference on Design, Automation and Test in Europe. 1177--1182."},{"key":"e_1_2_1_36_1","doi-asserted-by":"publisher","DOI":"10.5555\/278241.278300"},{"key":"e_1_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1145\/307418.307509"},{"key":"e_1_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2002.1043339"}],"container-title":["ACM Transactions on Embedded Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2435227.2435250","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2435227.2435250","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T08:18:55Z","timestamp":1750234735000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2435227.2435250"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,3]]},"references-count":38,"journal-issue":{"issue":"1s","published-print":{"date-parts":[[2013,3]]}},"alternative-id":["10.1145\/2435227.2435250"],"URL":"https:\/\/doi.org\/10.1145\/2435227.2435250","relation":{},"ISSN":["1539-9087","1558-3465"],"issn-type":[{"type":"print","value":"1539-9087"},{"type":"electronic","value":"1558-3465"}],"subject":[],"published":{"date-parts":[[2013,3]]},"assertion":[{"value":"2010-07-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2011-03-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2013-03-29","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}