{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:21:33Z","timestamp":1750306893301,"version":"3.41.0"},"reference-count":30,"publisher":"Association for Computing Machinery (ACM)","issue":"1s","license":[{"start":{"date-parts":[[2013,3,1]],"date-time":"2013-03-01T00:00:00Z","timestamp":1362096000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100004085","name":"Ministry of Education, Science and Technology","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100004085","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003725","name":"National Research Foundation of Korea","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100003725","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Embed. Comput. Syst."],"published-print":{"date-parts":[[2013,3]]},"abstract":"<jats:p>Flash memory offers attractive features, such as non-volatile, shock resistance, fast access and low power consumption for data storage. However, it has one main drawback of requiring an erase before updating the contents. Furthermore, the flash memory can only be erased for a limited number of times. These characteristics are controlled by a software layer called the flash translation layer (FTL). FTL efficiently manages read, write, and erase operations to enhance the overall performance, and considers wear-leveling to prolong the durability of flash memory. In this article, we identify the logical sector numbers corresponding to random data, termed as hot-LSNs, and distribute them to all available blocks without degrading the performance of the flash memory. From our evaluation, we found that the extra erase operations for distributing the hot-LSNs are very low compared to the overall performance. Even though Hot-LSNs Distributing Wear-Leveling Algorithm (Hot-DL) incorporates wear-leveling in the performance enhancing algorithm, Hot-DL only requires approximately 0.015% of extra erase operations compared to previous well-optimized performance enhancing algorithms, shared buffer scheme.<\/jats:p>","DOI":"10.1145\/2435227.2435258","type":"journal-article","created":{"date-parts":[[2018,1,4]],"date-time":"2018-01-04T16:27:31Z","timestamp":1515083251000},"page":"1-28","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":4,"title":["Hot-LSNs distributing wear-leveling algorithm for flash memory"],"prefix":"10.1145","volume":"12","author":[{"given":"Se Jin","family":"Kwon","sequence":"first","affiliation":[{"name":"Ajou University, Korea"}]},{"given":"Tae-Sun","family":"Chung","sequence":"additional","affiliation":[{"name":"Ajou University, Korea"}]}],"member":"320","published-online":{"date-parts":[[2013,3,29]]},"reference":[{"issue":"5","key":"e_1_2_1_1_1","first-page":"930","article-title":"Memory system using a flash memory and method of controlling the memory system","author":"Achiwa K.","year":"1999","unstructured":"Achiwa , K. 1999 . Memory system using a flash memory and method of controlling the memory system . U.S. Patent , no. 5 , 930 ,193. Achiwa, K. 1999. Memory system using a flash memory and method of controlling the memory system. U.S. Patent, no. 5,930,193.","journal-title":"U.S. Patent"},{"issue":"5","key":"e_1_2_1_2_1","first-page":"479","article-title":"Flash memory mass storage architecture incorporation wear leveling technique","author":"Assar M.","year":"1995","unstructured":"Assar , M. 1995 . Flash memory mass storage architecture incorporation wear leveling technique . U.S. Patent , no. 5 , 479 ,638. Assar, M. 1995. Flash memory mass storage architecture incorporation wear leveling technique. U.S. Patent, no. 5,479,638.","journal-title":"U.S. Patent"},{"issue":"5","key":"e_1_2_1_3_1","first-page":"404","article-title":"Flash file system","author":"Ban A.","year":"1995","unstructured":"Ban , A. 1995 . Flash file system . U.S. Patent , no. 5 , 404 ,485. Ban, A. 1995. Flash file system. U.S. Patent, no. 5,404,485.","journal-title":"U.S. Patent"},{"issue":"5","key":"e_1_2_1_4_1","first-page":"937","article-title":"Flash file system optimized for page-mode flash technologies","author":"Ban A.","year":"1999","unstructured":"Ban , A. 1999 . Flash file system optimized for page-mode flash technologies . U.S. Patent , no. 5 , 937 , 425. Ban, A. 1999. Flash file system optimized for page-mode flash technologies. U.S. Patent, no. 5,937, 425.","journal-title":"U.S. Patent"},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.scico.2008.09.014"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/1244002.1244248"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2010.14"},{"issue":"7","key":"e_1_2_1_8_1","first-page":"103","article-title":"Method and apparatus for managing an erase count block","author":"Chang R. C.","year":"2006","unstructured":"Chang , R. C. 2006 . Method and apparatus for managing an erase count block . U.S. Patent , no. 7 , 103 ,732. Chang, R. C. 2006. Method and apparatus for managing an erase count block. U.S. Patent, no. 7,103,732.","journal-title":"U.S. Patent"},{"key":"e_1_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2009.134"},{"key":"e_1_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1016\/S0164-1212(99)00059-X"},{"key":"e_1_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2009.03.005"},{"key":"e_1_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.sysarc.2007.02.005"},{"issue":"5","key":"e_1_2_1_13_1","first-page":"341","article-title":"Method for wear leveling in a flash eeprom memory","author":"Wells S.","year":"1994","unstructured":"E. Wells , S. , Heights , C. , and Calif . 1994 . Method for wear leveling in a flash eeprom memory . U.S. Patent , no. 5 , 341 ,339. E.Wells, S., Heights, C., and Calif. 1994. Method for wear leveling in a flash eeprom memory. U.S. Patent, no. 5,341,339.","journal-title":"U.S. Patent"},{"issue":"6","key":"e_1_2_1_14_1","first-page":"016","article-title":"Flash memory wear leveling system and method","author":"Han S.-W.","year":"2000","unstructured":"Han , S.-W. 2000 . Flash memory wear leveling system and method . U.S. Patent , no. 6 , 016 ,275. Han, S.-W. 2000. Flash memory wear leveling system and method. U.S. Patent, no. 6,016,275.","journal-title":"U.S. Patent"},{"key":"e_1_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.peva.2009.10.003"},{"key":"e_1_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/1289881.1289911"},{"key":"e_1_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/1721695.1721706"},{"issue":"6","key":"e_1_2_1_18_1","first-page":"381","article-title":"Method of driving remapping in flash memory and flash architecture suitable therefor","author":"Kim B.-S.","year":"2002","unstructured":"Kim , B.-S. and Lee , G. Y. 2002 . Method of driving remapping in flash memory and flash architecture suitable therefor . U.S. Patent , no. 6 , 381 ,176. Kim, B.-S. and Lee, G. Y. 2002. Method of driving remapping in flash memory and flash architecture suitable therefor. U.S. Patent, no. 6,381,176.","journal-title":"U.S. Patent"},{"key":"e_1_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2002.1010143"},{"key":"e_1_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.5555\/1317531.1317956"},{"key":"e_1_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2008.4560140"},{"key":"e_1_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1007\/s10617-011-9071-9"},{"key":"e_1_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1145\/1275986.1275990"},{"key":"e_1_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/1529282.1529648"},{"issue":"6","key":"e_1_2_1_25_1","first-page":"850","article-title":"Wear leveling techniques for flash eeprom systems","author":"Lofgren K. M. J.","year":"2005","unstructured":"Lofgren , K. M. J. 2005 . Wear leveling techniques for flash eeprom systems . U.S. Patent , no. 6 , 850 , 443. Lofgren, K. M. J. 2005. Wear leveling techniques for flash eeprom systems. U.S. Patent, no. 6,850, 443.","journal-title":"U.S. Patent"},{"key":"e_1_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1145\/1376804.1376806"},{"key":"e_1_2_1_27_1","unstructured":"Samsung S. 2011a. K9F5608X0D data book.  Samsung S. 2011a. K9F5608X0D data book."},{"key":"e_1_2_1_28_1","unstructured":"Samsung S. 2011b. NAND flash memory K9F1G1U0M data book.  Samsung S. 2011b. NAND flash memory K9F1G1U0M data book."},{"key":"e_1_2_1_29_1","unstructured":"Samsung S. 2011c. NAND flash memory K9GAG08U0M data book.  Samsung S. 2011c. NAND flash memory K9GAG08U0M data book."},{"issue":"5","key":"e_1_2_1_30_1","first-page":"905","article-title":"Flash memory card with block memory address arrangement","author":"Shinohara T.","year":"1999","unstructured":"Shinohara , T. 1999 . Flash memory card with block memory address arrangement . U.S. Patent , no. 5 , 905 ,993. Shinohara, T. 1999. Flash memory card with block memory address arrangement. U.S. Patent, no. 5,905,993.","journal-title":"U.S. Patent"}],"container-title":["ACM Transactions on Embedded Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2435227.2435258","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2435227.2435258","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T08:18:56Z","timestamp":1750234736000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2435227.2435258"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,3]]},"references-count":30,"journal-issue":{"issue":"1s","published-print":{"date-parts":[[2013,3]]}},"alternative-id":["10.1145\/2435227.2435258"],"URL":"https:\/\/doi.org\/10.1145\/2435227.2435258","relation":{},"ISSN":["1539-9087","1558-3465"],"issn-type":[{"type":"print","value":"1539-9087"},{"type":"electronic","value":"1558-3465"}],"subject":[],"published":{"date-parts":[[2013,3]]},"assertion":[{"value":"2010-10-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2011-07-01","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2013-03-29","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}