{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:21:32Z","timestamp":1750306892605,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":8,"publisher":"ACM","license":[{"start":{"date-parts":[[2013,2,11]],"date-time":"2013-02-11T00:00:00Z","timestamp":1360540800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2013,2,11]]},"DOI":"10.1145\/2435264.2435294","type":"proceedings-article","created":{"date-parts":[[2013,2,12]],"date-time":"2013-02-12T14:15:17Z","timestamp":1360678517000},"page":"167-170","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["Improving bitstream compression by modifying FPGA architecture"],"prefix":"10.1145","author":[{"given":"Seyyed Ahmad","family":"Razavi","sequence":"first","affiliation":[{"name":"Amirkabir University of Technology, Tehran, Iran"}]},{"given":"Morteza","family":"Saheb Zamani","sequence":"additional","affiliation":[{"name":"Amirkabir University of Technology, Tehran, Iran"}]}],"member":"320","published-online":{"date-parts":[[2013,2,11]]},"reference":[{"doi-asserted-by":"crossref","unstructured":"P. Stepien and M. Vasilko \"On Feasibility of FPGA Bitstream Compression During Placement and Routing \" International Conference on Field Programmable Logic and Applications 2006.  P. Stepien and M. Vasilko \"On Feasibility of FPGA Bitstream Compression During Placement and Routing \" International Conference on Field Programmable Logic and Applications 2006.","key":"e_1_3_2_1_1_1","DOI":"10.1109\/FPL.2006.311306"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_2_1","DOI":"10.1109\/ReConFig.2011.20"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_3_1","DOI":"10.1109\/FCCM.2001.19"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_4_1","DOI":"10.1109\/TVLSI.2009.2035704"},{"key":"e_1_3_2_1_5_1","volume-title":"DATE '06. Proceedings","volume":"2","author":"Martina M.","year":"2006"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_6_1","DOI":"10.1145\/1508128.1508150"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_7_1","DOI":"10.1002\/j.1538-7305.1951.tb01366.x"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_8_1","DOI":"10.1109\/TCAD.2005.859485"}],"event":{"sponsor":["SIGDA ACM Special Interest Group on Design Automation"],"acronym":"FPGA '13","name":"FPGA '13: The 2013 ACM\/SIGDA International Symposium on Field Programmable Gate Arrays","location":"Monterey California USA"},"container-title":["Proceedings of the ACM\/SIGDA international symposium on Field programmable gate arrays"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2435264.2435294","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2435264.2435294","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T08:18:56Z","timestamp":1750234736000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2435264.2435294"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,2,11]]},"references-count":8,"alternative-id":["10.1145\/2435264.2435294","10.1145\/2435264"],"URL":"https:\/\/doi.org\/10.1145\/2435264.2435294","relation":{},"subject":[],"published":{"date-parts":[[2013,2,11]]},"assertion":[{"value":"2013-02-11","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}