{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:21:32Z","timestamp":1750306892317,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":11,"publisher":"ACM","license":[{"start":{"date-parts":[[2013,2,11]],"date-time":"2013-02-11T00:00:00Z","timestamp":1360540800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2013,2,11]]},"DOI":"10.1145\/2435264.2435322","type":"proceedings-article","created":{"date-parts":[[2013,2,12]],"date-time":"2013-02-12T14:15:17Z","timestamp":1360678517000},"page":"269-269","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["A novel multithread routing method for FPGAs (abstract only)"],"prefix":"10.1145","author":[{"given":"Chun","family":"Zhu","sequence":"first","affiliation":[{"name":"Fudan University, Shanghai, China"}]},{"given":"Qiuli","family":"Li","sequence":"additional","affiliation":[{"name":"Fudan University, Shanghai, China"}]},{"given":"Jian","family":"Wang","sequence":"additional","affiliation":[{"name":"Fudan University, Shanghai, China"}]},{"given":"Jinmei","family":"Lai","sequence":"additional","affiliation":[{"name":"Fudan University, Shanghai, China"}]}],"member":"320","published-online":{"date-parts":[[2013,2,11]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/201310.201328"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.5555\/647924.738755"},{"volume-title":"The Fifth Canadian Workshop on Field Programmable Devices, IEEE","year":"1998","author":"Tessier R.","key":"e_1_3_2_1_3_1"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1145\/329166.329201"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2010.5681758"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2011.84"},{"volume-title":"USA","year":"1999","author":"Betz V.","key":"e_1_3_2_1_7_1"},{"volume-title":"Wrox","year":"2008","author":"Hughes C.","key":"e_1_3_2_1_8_1"},{"volume-title":"SunSoft Press","year":"1996","author":"Lewis B.","key":"e_1_3_2_1_9_1"},{"key":"e_1_3_2_1_10_1","unstructured":"Xilinx Inc. San Jose CA.Virtex-2 Platform FPGAs: Complete Data Sheet 2007.  Xilinx Inc. San Jose CA.Virtex-2 Platform FPGAs: Complete Data Sheet 2007."},{"key":"e_1_3_2_1_11_1","unstructured":"Xilinx Inc. San Jose CA. ISE Design Suite Software Manuals 2010.  Xilinx Inc. San Jose CA. ISE Design Suite Software Manuals 2010."}],"event":{"name":"FPGA '13: The 2013 ACM\/SIGDA International Symposium on Field Programmable Gate Arrays","sponsor":["SIGDA ACM Special Interest Group on Design Automation"],"location":"Monterey California USA","acronym":"FPGA '13"},"container-title":["Proceedings of the ACM\/SIGDA international symposium on Field programmable gate arrays"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2435264.2435322","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T08:18:56Z","timestamp":1750234736000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2435264.2435322"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,2,11]]},"references-count":11,"alternative-id":["10.1145\/2435264.2435322","10.1145\/2435264"],"URL":"https:\/\/doi.org\/10.1145\/2435264.2435322","relation":{},"subject":[],"published":{"date-parts":[[2013,2,11]]},"assertion":[{"value":"2013-02-11","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}