{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:21:33Z","timestamp":1750306893509,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":17,"publisher":"ACM","license":[{"start":{"date-parts":[[2013,2,11]],"date-time":"2013-02-11T00:00:00Z","timestamp":1360540800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2013,2,11]]},"DOI":"10.1145\/2435264.2435327","type":"proceedings-article","created":{"date-parts":[[2013,2,12]],"date-time":"2013-02-12T14:15:17Z","timestamp":1360678517000},"page":"271-271","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["A novel FPGA design framework with VLSI post-routing performance analysis (abstract only)"],"prefix":"10.1145","author":[{"given":"Qian","family":"Zhao","sequence":"first","affiliation":[{"name":"Kumamoto University, Kumamoto, Japan"}]},{"given":"Kazuki","family":"Inoue","sequence":"additional","affiliation":[{"name":"Kumamoto University, Kumamoto, Japan"}]},{"given":"Motoki","family":"Amagasaki","sequence":"additional","affiliation":[{"name":"Kumamoto University, Kumamoto, Japan"}]},{"given":"Masahiro","family":"Iida","sequence":"additional","affiliation":[{"name":"Kumamoto University, Kumamoto, Japan"}]},{"given":"Morihiro","family":"Kuga","sequence":"additional","affiliation":[{"name":"Kumamoto University, Kumamoto, Japan"}]},{"given":"Toshinori","family":"Sueyoshi","sequence":"additional","affiliation":[{"name":"Kumamoto University, Kumamoto, Japan"}]}],"member":"320","published-online":{"date-parts":[[2013,2,11]]},"reference":[{"unstructured":"\"Zynq All Programmable SoC Architecture \" 2012. http:\/\/www.xilinx.com\/products\/silicon-devices\/soc\/index.htm.  \"Zynq All Programmable SoC Architecture \" 2012. http:\/\/www.xilinx.com\/products\/silicon-devices\/soc\/index.htm.","key":"e_1_3_2_1_1_1"},{"unstructured":"\"SoC FPGAs: Integration to Reduce Power Cost and Board Size \" 2012. http:\/\/www.altera.com\/devices\/processor\/soc-fpga\/proc-soc-fpga.html.  \"SoC FPGAs: Integration to Reduce Power Cost and Board Size \" 2012. http:\/\/www.altera.com\/devices\/processor\/soc-fpga\/proc-soc-fpga.html.","key":"e_1_3_2_1_2_1"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_3_1","DOI":"10.1109\/FCCM.2010.31"},{"unstructured":"A. Mishchenko etal \"ABC: A System for Sequential Synthesis and Verification \" http:\/\/www.eecs.berkeley.edu\/~alanmi\/abc\/ 2009.  A. Mishchenko et al. \"ABC: A System for Sequential Synthesis and Verification \" http:\/\/www.eecs.berkeley.edu\/~alanmi\/abc\/ 2009.","key":"e_1_3_2_1_4_1"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_5_1","DOI":"10.1145\/296399.296426"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_6_1","DOI":"10.1145\/1950413.1950457"},{"issue":"1","key":"e_1_3_2_1_7_1","first-page":"77","volume":"13","author":"Bozorgzadeh E.","year":"2004","journal-title":"\"Routability-driven Packing: Metrics and Algorithms for Cluster-Based FPGAs,\" Journal of Circuits Systems and Computers"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_8_1","DOI":"10.1145\/1508128.1508150"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_9_1","DOI":"10.1145\/2145694.2145708"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_10_1","DOI":"10.1145\/1950413.1950441"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_11_1","DOI":"10.1109\/TCAD.2005.855945"},{"doi-asserted-by":"crossref","unstructured":"N. Miyamoto Y. Matsumoto H. Koike T. Matsumura K. Osada Y. Nakagawa and T. Ohmi \"Development of a CAD Tool for 3D-FPGAs \" Proc. of the 2010 3D Systems Integration Conference pp.1--6 Nov. 2010.  N. Miyamoto Y. Matsumoto H. Koike T. Matsumura K. Osada Y. Nakagawa and T. Ohmi \"Development of a CAD Tool for 3D-FPGAs \" Proc. of the 2010 3D Systems Integration Conference pp.1--6 Nov. 2010.","key":"e_1_3_2_1_12_1","DOI":"10.1109\/3DIC.2010.5751458"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_13_1","DOI":"10.1109\/FPL.2011.69"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_14_1","DOI":"10.1145\/1950413.1950425"},{"unstructured":"\"The Mono Project: Cross Platform Opensource .NET Development Framework \" http:\/\/www.mono-project.com 2012  \"The Mono Project: Cross Platform Opensource .NET Development Framework \" http:\/\/www.mono-project.com 2012","key":"e_1_3_2_1_15_1"},{"doi-asserted-by":"crossref","unstructured":"V. Betz J. Rose and A. Marquardt \"Architecture and CAD for Deep-Submicron FPGAs \" Kluwer Academic Publishers Mar. 1999.   V. Betz J. Rose and A. Marquardt \"Architecture and CAD for Deep-Submicron FPGAs \" Kluwer Academic Publishers Mar. 1999.","key":"e_1_3_2_1_16_1","DOI":"10.1007\/978-1-4615-5145-4"},{"doi-asserted-by":"publisher","key":"e_1_3_2_1_17_1","DOI":"10.1145\/275107.275134"}],"event":{"sponsor":["SIGDA ACM Special Interest Group on Design Automation"],"acronym":"FPGA '13","name":"FPGA '13: The 2013 ACM\/SIGDA International Symposium on Field Programmable Gate Arrays","location":"Monterey California USA"},"container-title":["Proceedings of the ACM\/SIGDA international symposium on Field programmable gate arrays"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2435264.2435327","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T08:18:56Z","timestamp":1750234736000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2435264.2435327"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,2,11]]},"references-count":17,"alternative-id":["10.1145\/2435264.2435327","10.1145\/2435264"],"URL":"https:\/\/doi.org\/10.1145\/2435264.2435327","relation":{},"subject":[],"published":{"date-parts":[[2013,2,11]]},"assertion":[{"value":"2013-02-11","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}