{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:21:33Z","timestamp":1750306893662,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":30,"publisher":"ACM","license":[{"start":{"date-parts":[[2013,2,11]],"date-time":"2013-02-11T00:00:00Z","timestamp":1360540800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2013,2,11]]},"DOI":"10.1145\/2435264.2435340","type":"proceedings-article","created":{"date-parts":[[2013,2,12]],"date-time":"2013-02-12T14:15:17Z","timestamp":1360678517000},"page":"277-277","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["Low power FPGA design using post-silicon device aging (abstract only)"],"prefix":"10.1145","author":[{"given":"Sheng","family":"Wei","sequence":"first","affiliation":[{"name":"University of California, Los Angeles, Los Angeles, CA, USA"}]},{"given":"Jason Xin","family":"Zheng","sequence":"additional","affiliation":[{"name":"University of California, Los Angeles, Los Angeles, CA, USA"}]},{"given":"Miodrag","family":"Potkonjak","sequence":"additional","affiliation":[{"name":"University of California, Los Angeles, Los Angeles, CA, USA"}]}],"member":"320","published-online":{"date-parts":[[2013,2,11]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2009.2035453"},{"key":"e_1_3_2_1_2_1","first-page":"273","volume-title":"IRPS","author":"S. Chakravarthi","year":"2004"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.5555\/1167704.1167712"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/TSM.2004.831934"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2005.78"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2011.15"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2011555"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/1508128.1508133"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/1950413.1950437"},{"key":"e_1_3_2_1_10_1","first-page":"1","author":"Cheng L.","year":"2006","journal-title":"FPL"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/1216919.1216948"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/1216919.1216930"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"crossref","first-page":"51","DOI":"10.1145\/968280.968289","author":"Gayasen A.","year":"2004","journal-title":"FPGA"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/968280.968288"},{"key":"e_1_3_2_1_15_1","first-page":"173","author":"Chow C.","year":"2005","journal-title":"FPT"},{"key":"e_1_3_2_1_16_1","first-page":"339","author":"Kheradmand-Boroujeni B.","year":"2010","journal-title":"DATE"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/1216919.1216946"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837332"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/1120725.1120987"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/1391469.1391624"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996775"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/1278480.1278573"},{"key":"e_1_3_2_1_23_1","unstructured":"ITC99 Benchmark Home Page http:\/\/www.cerc.utexas.edu\/itc99-benchmarks\/bench.html  ITC99 Benchmark Home Page http:\/\/www.cerc.utexas.edu\/itc99-benchmarks\/bench.html"},{"key":"e_1_3_2_1_24_1","unstructured":"Opencores http:\/\/opencores.org\/  Opencores http:\/\/opencores.org\/"},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.sse.2009.03.008"},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1126\/science.1111104"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1109\/16.735728"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/968280.968285"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/1233501.1233514"},{"key":"e_1_3_2_1_30_1","first-page":"23","volume-title":"VLSI","author":"Kim Y.","year":"2006"}],"event":{"name":"FPGA '13: The 2013 ACM\/SIGDA International Symposium on Field Programmable Gate Arrays","sponsor":["SIGDA ACM Special Interest Group on Design Automation"],"location":"Monterey California USA","acronym":"FPGA '13"},"container-title":["Proceedings of the ACM\/SIGDA international symposium on Field programmable gate arrays"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2435264.2435340","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T08:18:56Z","timestamp":1750234736000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2435264.2435340"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,2,11]]},"references-count":30,"alternative-id":["10.1145\/2435264.2435340","10.1145\/2435264"],"URL":"https:\/\/doi.org\/10.1145\/2435264.2435340","relation":{},"subject":[],"published":{"date-parts":[[2013,2,11]]},"assertion":[{"value":"2013-02-11","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}