{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:21:16Z","timestamp":1750306876745,"version":"3.41.0"},"reference-count":9,"publisher":"Association for Computing Machinery (ACM)","issue":"4","license":[{"start":{"date-parts":[[2012,11,1]],"date-time":"2012-11-01T00:00:00Z","timestamp":1351728000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["SIGBED Rev."],"published-print":{"date-parts":[[2012,11]]},"abstract":"<jats:p>Due to the importance of resource allocation and energy efficiency, this paper considers minimizing priority inversion and energy consumptions in the embedded real-time systems. While dynamic voltage scaling (DVS) is known to reduce dynamic power consumption, it also causes increased blocking time of lower priority tasks and leakage energy consumption due to increased execution. We proposed a concept of latency locking to prevent priority inversion using sleeping mode and define a block-free interval in which both DVS and leakage-aware methods can be applied. In order to compute the optimal sleeping time and its duration and to meet the timing constraints, we also propose a weighted directed graph (WDG) to obtain additional task information. By traversing WDG, task information can be updated online and the scheduling decisions could be done in linear time complexity.<\/jats:p>","DOI":"10.1145\/2452537.2452540","type":"journal-article","created":{"date-parts":[[2013,3,25]],"date-time":"2013-03-25T13:31:59Z","timestamp":1364218319000},"page":"21-24","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["An energy-aware scheduling for real-time task synchronization using DVS and leakage-aware methods"],"prefix":"10.1145","volume":"9","author":[{"given":"Da-Ren","family":"Chen","sequence":"first","affiliation":[{"name":"National Taichung University of Science and Technology, Taichung, Taiwan, R.O.C."}]},{"given":"You-Shyang","family":"Chen","sequence":"additional","affiliation":[{"name":"Hwa Hsia Institute of Technology Taipei, Taiwan, R.O.C."}]}],"member":"320","published-online":{"date-parts":[[2012,11]]},"reference":[{"key":"e_1_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/360128.360148"},{"key":"e_1_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/1134650.1134673"},{"key":"e_1_2_1_3_1","volume-title":"Proceedings of the Fourteenth Annual ACM-SIAM Symposium on Discrete Algorithms (On the Inner Harbour Baltimore, MD, USA Jan. 12--14","author":"Irani S.","year":"2003","unstructured":"Irani , S. , Shukla , S. , and Gupta , R . 2003. Algorithms for power savings . In Proceedings of the Fourteenth Annual ACM-SIAM Symposium on Discrete Algorithms (On the Inner Harbour Baltimore, MD, USA Jan. 12--14 , 2003 ). DA 03. ACM, New York, NY, 37--46. Irani, S., Shukla, S., and Gupta, R. 2003. Algorithms for power savings. In Proceedings of the Fourteenth Annual ACM-SIAM Symposium on Discrete Algorithms (On the Inner Harbour Baltimore, MD, USA Jan. 12--14, 2003). DA 03. ACM, New York, NY, 37--46."},{"key":"e_1_2_1_4_1","volume-title":"Real-time systems","author":"Jane W. S.","year":"2000","unstructured":"Jane W. S. Liu . Real-time systems . Prentice Hall PTR Upper Saddle River , NJ , USA, ( 2000 ), ISBN:0130996513. Jane W. S. Liu. Real-time systems. Prentice Hall PTR Upper Saddle River, NJ, USA, (2000), ISBN:0130996513."},{"key":"e_1_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/1065579.1065612"},{"key":"e_1_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/871506.871605"},{"key":"e_1_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/12.57058"},{"key":"e_1_2_1_8_1","volume-title":"Inc.","author":"Silberschatz A. P.","year":"2011","unstructured":"Silberschatz , A. P. , Galvin , B. , and G. Gagne . 2011. Operating System Concepts. John Willey and Sons , Inc. , ( 2011 ). Silberschatz, A. P., Galvin, B., and G. Gagne. 2011. Operating System Concepts. John Willey and Sons, Inc., (2011)."},{"key":"e_1_2_1_9_1","volume-title":"23rd Proceedings IEEE Real-Time Systems Symp.","author":"Zhang F.","year":"2002","unstructured":"Zhang , F. , and Chanson , S. T . 2002. Processor voltage scheduling for real-time tasks with non-preemptible sections . In 23rd Proceedings IEEE Real-Time Systems Symp. , ( Austin, TX , Dec. 2002 ). RTSS 02. IEEE, 235--245. Zhang, F., and Chanson, S. T. 2002. Processor voltage scheduling for real-time tasks with non-preemptible sections. In 23rd Proceedings IEEE Real-Time Systems Symp., (Austin, TX, Dec. 2002). RTSS 02. IEEE, 235--245."}],"container-title":["ACM SIGBED Review"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2452537.2452540","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2452537.2452540","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T08:18:26Z","timestamp":1750234706000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2452537.2452540"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,11]]},"references-count":9,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2012,11]]}},"alternative-id":["10.1145\/2452537.2452540"],"URL":"https:\/\/doi.org\/10.1145\/2452537.2452540","relation":{},"ISSN":["1551-3688"],"issn-type":[{"type":"electronic","value":"1551-3688"}],"subject":[],"published":{"date-parts":[[2012,11]]},"assertion":[{"value":"2012-11-01","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}