{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,12]],"date-time":"2026-01-12T20:38:33Z","timestamp":1768250313601,"version":"3.49.0"},"publisher-location":"New York, NY, USA","reference-count":43,"publisher":"ACM","license":[{"start":{"date-parts":[[2013,5,29]],"date-time":"2013-05-29T00:00:00Z","timestamp":1369785600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2013,5,29]]},"DOI":"10.1145\/2463209.2488864","type":"proceedings-article","created":{"date-parts":[[2013,5,28]],"date-time":"2013-05-28T16:35:41Z","timestamp":1369758941000},"page":"1-10","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":14,"title":["Rapid exploration of processing and design guidelines to overcome carbon nanotube variations"],"prefix":"10.1145","author":[{"given":"Gage","family":"Hills","sequence":"first","affiliation":[{"name":"Stanford University, CA"}]},{"given":"Jie","family":"Zhang","sequence":"additional","affiliation":[{"name":"Google, Inc."}]},{"given":"Charles","family":"Mackin","sequence":"additional","affiliation":[{"name":"Massachusetts Institute of Technology, MA"}]},{"given":"Max","family":"Shulaker","sequence":"additional","affiliation":[{"name":"Stanford University, CA"}]},{"given":"Hai","family":"Wei","sequence":"additional","affiliation":[{"name":"Stanford University, CA"}]},{"given":"H.-S. Philip","family":"Wong","sequence":"additional","affiliation":[{"name":"Stanford University, CA"}]},{"given":"Subhasish","family":"Mitra","sequence":"additional","affiliation":[{"name":"Stanford University, CA"}]}],"member":"320","published-online":{"date-parts":[[2013,5,29]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2007.911051"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1038\/nnano.2006.52"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1006\/jath.1994.1136"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1021\/nn302185d"},{"key":"e_1_3_2_1_5_1","unstructured":"{Chang 12} Chang L. et al. \"IEDM Short Course \" IEDM 2012.  {Chang 12} Chang L. et al . \"IEDM Short Course \" IEDM 2012."},{"key":"e_1_3_2_1_6_1","first-page":"1","article-title":"FLUTE: fast lookup table based wirelength estimation technique","volume":"27","author":"Chu C.","year":"2004","unstructured":"{Chu 04} Chu , C. , \" FLUTE: fast lookup table based wirelength estimation technique ,\" ICCAD , Vol. 27 . 1 , pp. 70--83, 2004 . {Chu 04} Chu, C., \"FLUTE: fast lookup table based wirelength estimation technique,\" ICCAD, Vol. 27.1, pp. 70--83, 2004.","journal-title":"ICCAD"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1063\/1.4731776"},{"key":"e_1_3_2_1_8_1","unstructured":"{Eigen} http:\/\/eigen.tuxfamily.org.  {Eigen} http:\/\/eigen.tuxfamily.org."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1021\/nl203701g"},{"key":"e_1_3_2_1_10_1","first-page":"4","article-title":"Scalable and fully self-aligned n-type carbon nanotube transistors with gate-all-around","author":"Franklin A.","year":"2012","unstructured":"{Franklin 12b} Franklin , A. , et al. , \" Scalable and fully self-aligned n-type carbon nanotube transistors with gate-all-around ,\" IEDM , pp. 4 -- 5 , 2012 . {Franklin 12b} Franklin, A., et al., \"Scalable and fully self-aligned n-type carbon nanotube transistors with gate-all-around,\" IEDM, pp. 4--5, 2012.","journal-title":"IEDM"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1021\/nn203516z"},{"key":"e_1_3_2_1_12_1","unstructured":"{ITRS} International Technology Roadmap for Semiconductors (2009).  {ITRS} International Technology Roadmap for Semiconductors (2009)."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1038\/nnano.2007.77"},{"key":"e_1_3_2_1_14_1","volume-title":"European Workshop on CMOS Variability","author":"Keller S.","year":"2011","unstructured":"{Keller 11} Keller , S. , et al., \" Reliable Minimum Energy CMOS Circuit Design ,\" European Workshop on CMOS Variability , 2011 . {Keller 11} Keller, S., et al., \"Reliable Minimum Energy CMOS Circuit Design,\" European Workshop on CMOS Variability, 2011."},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/1105734.1105737"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2009.2033168"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1983.1052035"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.831796"},{"key":"e_1_3_2_1_19_1","unstructured":"{Nangate} http:\/\/www.nangate.com.  {Nangate} http:\/\/www.nangate.com."},{"key":"e_1_3_2_1_20_1","first-page":"569","article-title":"High performance CMOS variability in the 65nm regime and beyond","author":"Nassif S.","year":"2007","unstructured":"{Nassif 07} Nassif , S. , et al. \" High performance CMOS variability in the 65nm regime and beyond ,\" IEDM , pp. 569 -- 571 , 2007 . {Nassif 07} Nassif, S., et al. \"High performance CMOS variability in the 65nm regime and beyond,\" IEDM, pp. 569--571, 2007.","journal-title":"IEDM"},{"key":"e_1_3_2_1_21_1","unstructured":"{OpenSparc} http:\/\/www.opensparc.net\/opensparc-t2.  {OpenSparc} http:\/\/www.opensparc.net\/opensparc-t2."},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1038\/nnano.2012.189"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.2003278"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2009.2016562"},{"key":"e_1_3_2_1_25_1","first-page":"1","article-title":"VMR: VLSI-compatible metallic carbon nanotube removal for imperfection-immune cascaded multi-stage digital logic circuits using carbon nanotube FETs","author":"Patil N.","year":"2009","unstructured":"{Patil 09b} Patil , N. , et al. , \" VMR: VLSI-compatible metallic carbon nanotube removal for imperfection-immune cascaded multi-stage digital logic circuits using carbon nanotube FETs ,\" IEDM , pp. 1 -- 4 , 2009 . {Patil 09b} Patil, N., et al., \"VMR: VLSI-compatible metallic carbon nanotube removal for imperfection-immune cascaded multi-stage digital logic circuits using carbon nanotube FETs,\" IEDM, pp. 1--4, 2009.","journal-title":"IEDM"},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2010.2076323"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2007.901882"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2008.2010604"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1145\/1247480.1247522"},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.923255"},{"key":"e_1_3_2_1_31_1","first-page":"5","article-title":"Linear increases in carbon nanotube density through multiple transfer technique","volume":"11","author":"Shulaker M. M.","year":"1881","unstructured":"{Shulaker 11} Shulaker , M. M. , , \" Linear increases in carbon nanotube density through multiple transfer technique ,\" Nano letters , Vol. 11 . 5 , pp. 1881 --1886, 2011. {Shulaker 11} Shulaker, M. M., et al., \"Linear increases in carbon nanotube density through multiple transfer technique,\" Nano letters, Vol. 11.5, pp. 1881--1886, 2011.","journal-title":"Nano letters"},{"key":"e_1_3_2_1_32_1","first-page":"112","article-title":"Experimental Demonstration of a Fully Digital Capacitive Sensor Interface Built Entirely Using Carbon Nanotube FETs","author":"Shulaker M. M.","year":"2013","unstructured":"{Shulaker 13} Shulaker , M. M. , , \" Experimental Demonstration of a Fully Digital Capacitive Sensor Interface Built Entirely Using Carbon Nanotube FETs ,\" ISSCC , pp. 112 -- 113 , 2013 . {Shulaker 13} Shulaker, M. M., et al., \"Experimental Demonstration of a Fully Digital Capacitive Sensor Interface Built Entirely Using Carbon Nanotube FETs,\" ISSCC, pp. 112--113, 2013.","journal-title":"ISSCC"},{"key":"e_1_3_2_1_33_1","unstructured":"{SPICE} http:\/\/nano.stanford.edu\/models.php.  {SPICE} http:\/\/nano.stanford.edu\/models.php."},{"key":"e_1_3_2_1_34_1","first-page":"1","article-title":"A non-iterative compact model for carbon nanotube FETs incorporating source exhaustion effects","author":"Wei L.","year":"2009","unstructured":"{Wei 09} Wei , L. , et al. , \" A non-iterative compact model for carbon nanotube FETs incorporating source exhaustion effects ,\" IEDM , pp. 1 -- 4 , 2009 . {Wei 09} Wei, L., et al., \"A non-iterative compact model for carbon nanotube FETs incorporating source exhaustion effects,\" IEDM, pp. 1--4, 2009.","journal-title":"IEDM"},{"key":"e_1_3_2_1_35_1","first-page":"237","volume-title":"Proc. Symp. VLSI Tech.","author":"Wei H.","year":"2010","unstructured":"{Wei 10} Wei , H. , et al., \" Efficient Metallic Carbon Nanotube Removal Readily Scalable to Wafer-Level VLSI CNFET Circuits ,\" Proc. Symp. VLSI Tech. , pp. 237 -- 238 , 2010 . {Wei 10} Wei, H., et al., \"Efficient Metallic Carbon Nanotube Removal Readily Scalable to Wafer-Level VLSI CNFET Circuits,\" Proc. Symp. VLSI Tech., pp. 237--238, 2010."},{"key":"e_1_3_2_1_36_1","volume-title":"CMOS VLSI Design,\" Pearson\/Addison Wesley","author":"Weste N. H.","year":"2005","unstructured":"{Weste 05} Weste , N. H. , and Harris , D. M. , \" CMOS VLSI Design,\" Pearson\/Addison Wesley , 2005 . {Weste 05} Weste, N. H., and Harris, D. M., \"CMOS VLSI Design,\" Pearson\/Addison Wesley, 2005."},{"key":"e_1_3_2_1_37_1","doi-asserted-by":"crossref","unstructured":"{Shor 85} Shor N. Z. \"Minimization Methods for Non-differentiable Functions \" Springer-Verlag 1985.   {Shor 85} Shor N. Z. \"Minimization Methods for Non-differentiable Functions \" Springer-Verlag 1985.","DOI":"10.1007\/978-3-642-82118-9"},{"key":"e_1_3_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1629933"},{"key":"e_1_3_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2009.2023197"},{"key":"e_1_3_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837497"},{"key":"e_1_3_2_1_41_1","first-page":"4","article-title":"Overcoming carbon nanotube variations through co-optimized technology and circuit design","author":"Zhang J.","year":"2011","unstructured":"{Zhang 11a} Zhang , J. , et al. , \" Overcoming carbon nanotube variations through co-optimized technology and circuit design ,\" IEDM , pp. 4 -- 6 , 2011 . {Zhang 11a} Zhang, J., et al., \"Overcoming carbon nanotube variations through co-optimized technology and circuit design,\" IEDM, pp. 4--6, 2011.","journal-title":"IEDM"},{"key":"e_1_3_2_1_42_1","volume-title":"Diss.","author":"Zhang J.","year":"2011","unstructured":"{Zhang 11b} Zhang , J. , \"Variation-aware design of carbon nanotube digital VLSI circuits,\" Ph.D . Diss. , Stanford University , 2011 . {Zhang 11b} Zhang, J., \"Variation-aware design of carbon nanotube digital VLSI circuits,\" Ph.D. Diss., Stanford University, 2011."},{"key":"e_1_3_2_1_43_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2187527"}],"event":{"name":"DAC '13: The 50th Annual Design Automation Conference 2013","location":"Austin Texas","acronym":"DAC '13","sponsor":["EDAC Electronic Design Automation Consortium","SIGDA ACM Special Interest Group on Design Automation","IEEE-CEDA","SIGBED ACM Special Interest Group on Embedded Systems"]},"container-title":["Proceedings of the 50th Annual Design Automation Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2463209.2488864","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2463209.2488864","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T08:39:38Z","timestamp":1750235978000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2463209.2488864"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,5,29]]},"references-count":43,"alternative-id":["10.1145\/2463209.2488864","10.1145\/2463209"],"URL":"https:\/\/doi.org\/10.1145\/2463209.2488864","relation":{},"subject":[],"published":{"date-parts":[[2013,5,29]]},"assertion":[{"value":"2013-05-29","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}