{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,31]],"date-time":"2026-03-31T09:00:16Z","timestamp":1774947616329,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":20,"publisher":"ACM","license":[{"start":{"date-parts":[[2013,5,29]],"date-time":"2013-05-29T00:00:00Z","timestamp":1369785600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2013,5,29]]},"DOI":"10.1145\/2463209.2488867","type":"proceedings-article","created":{"date-parts":[[2013,5,28]],"date-time":"2013-05-28T16:35:41Z","timestamp":1369758941000},"page":"1-6","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":98,"title":["Understanding the trade-offs in multi-level cell ReRAM memory design"],"prefix":"10.1145","author":[{"given":"Cong","family":"Xu","sequence":"first","affiliation":[{"name":"Pennsylvania State University"}]},{"given":"Dimin","family":"Niu","sequence":"additional","affiliation":[{"name":"Pennsylvania State University"}]},{"given":"Naveen","family":"Muralimanohar","sequence":"additional","affiliation":[{"name":"Hewlett-Packard Laboratory"}]},{"given":"Norman P.","family":"Jouppi","sequence":"additional","affiliation":[{"name":"Hewlett-Packard Laboratory"}]},{"given":"Yuan","family":"Xie","sequence":"additional","affiliation":[{"name":"Pennsylvania State University and AMD Research"}]}],"member":"320","published-online":{"date-parts":[[2013,5,29]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"Proceedings of the International Electron Devices Meeting","author":"Chien W.-C.","year":"2011","unstructured":"W.-C. Chien WOx resistive memory with excellent reliability . In Proceedings of the International Electron Devices Meeting , Dec. 2011 . W.-C. Chien et al. Multi-level 40nm WOx resistive memory with excellent reliability. In Proceedings of the International Electron Devices Meeting, Dec. 2011."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2185930"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2010.2102002"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2012.2210856"},{"key":"e_1_3_2_1_5_1","unstructured":"IC Knowledge LLC. IC cost model revision 1105.  IC Knowledge LLC. IC cost model revision 1105."},{"key":"e_1_3_2_1_6_1","volume-title":"Proceedings of International Solid-State Circuits Conference","author":"Kawahara A.","year":"2012","unstructured":"A. Kawahara ReRAM macro with 443MB\/s write throughput . In Proceedings of International Solid-State Circuits Conference , Feb. 2012 . A. Kawahara et al. An 8Mb multi-layered cross-point ReRAM macro with 443MB\/s write throughput. In Proceedings of International Solid-State Circuits Conference, Feb. 2012."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555758"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2009.2034670"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2012.6242466"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/IMW.2012.6213650"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1063\/1.3151822"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/66.999606"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/MCAS.2009.935695"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2010.2042677"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2011.5746281"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1063\/1.3518514"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2012.2190369"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1063\/1.2818691"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1063\/1.3679610"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2006.91"}],"event":{"name":"DAC '13: The 50th Annual Design Automation Conference 2013","location":"Austin Texas","acronym":"DAC '13","sponsor":["EDAC Electronic Design Automation Consortium","SIGDA ACM Special Interest Group on Design Automation","IEEE-CEDA","SIGBED ACM Special Interest Group on Embedded Systems"]},"container-title":["Proceedings of the 50th Annual Design Automation Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2463209.2488867","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2463209.2488867","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T08:39:38Z","timestamp":1750235978000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2463209.2488867"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,5,29]]},"references-count":20,"alternative-id":["10.1145\/2463209.2488867","10.1145\/2463209"],"URL":"https:\/\/doi.org\/10.1145\/2463209.2488867","relation":{},"subject":[],"published":{"date-parts":[[2013,5,29]]},"assertion":[{"value":"2013-05-29","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}